Messages in this thread | | | Date | Thu, 20 Jul 2023 15:24:49 +0530 | Subject | Re: [PATCH v2] pinctrl: qcom: Add intr_target_width field to support increased number of interrupt targets | From | Ninad Naik <> |
| |
Hi Bjorn,
On 7/18/2023 9:02 PM, Bjorn Andersson wrote: > On Tue, Jul 18, 2023 at 12:12:46PM +0530, Ninad Naik wrote: >> SA8775 and newer target have added support for an increased number of >> interrupt targets. To implement this change, the intr_target field, which >> is used to configure the interrupt target in the interrupt configuration >> register is increased from 3 bits to 4 bits. >> >> In accordance to these updates, a new intr_target_width member is >> introduced in msm_pingroup structure. This member stores the value of >> width of intr_target field in the interrupt configuration register. This >> value is used to dynamically calculate and generate mask for setting the >> intr_target field. By default, this mask is set to 3 bit wide, to ensure >> backward compatibility with the older targets. >> >> Changes in v2 : >> ----------------- >> - Changed initial definition of intr_target_mask variable to use GENMASK(). >> - Update commit subject appropiately. >> - Add Fixes tag. >> - v1 : https://lore.kernel.org/all/20230714061010.15817-1-quic_ninanaik@quicinc.com/ > > Thanks for adding a good changelog, very much appreciated. The changelog > should be added below the '---' line though, as it typically don't add > value to the git history (except drivers/gpu/* which wants it here...). > Apologies for the mistake. I will make a note of this and correct going forward. > Perhaps Linus can drop it as he applies the patch, no need to resubmit > unless he ask you to. > > Thanks, > Bjorn
Thanks, Ninad
| |