Messages in this thread | | | Date | Thu, 8 Jun 2023 14:06:48 +0800 | Subject | Re: [PATCH v3 12/21] KVM:x86: Add fault checks for guest CR4.CET setting | From | "Yang, Weijiang" <> |
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On 6/6/2023 7:03 PM, Chao Gao wrote: > On Thu, May 11, 2023 at 12:08:48AM -0400, Yang Weijiang wrote: >> Check potential faults for CR4.CET setting per Intel SDM. >> CR4.CET is the master control bit for CET features (SHSTK and IBT). >> In addition to basic support checks, > To me, this implies some checks against CR4.CET when enabling SHSTK or > IBT. but the checks are not added by this patch. Then, why bother to > mention this?
OK, I'll remove these unnecessary words and change the commit logs.
> >> CET can be enabled if and only >> if CR0.WP==1, i.e. setting CR4.CET=1 faults if CR0.WP==0 and setting >> CR0.WP=0 fails if CR4.CET==1. >> >> Co-developed-by: Sean Christopherson <sean.j.christopherson@intel.com> >> Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> >> Signed-off-by: Yang Weijiang <weijiang.yang@intel.com> >> --- >> arch/x86/kvm/x86.c | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c >> index a768cbf3fbb7..b6eec9143129 100644 >> --- a/arch/x86/kvm/x86.c >> +++ b/arch/x86/kvm/x86.c >> @@ -995,6 +995,9 @@ int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0) >> (is_64_bit_mode(vcpu) || kvm_is_cr4_bit_set(vcpu, X86_CR4_PCIDE))) >> return 1; >> >> + if (!(cr0 & X86_CR0_WP) && kvm_is_cr4_bit_set(vcpu, X86_CR4_CET)) >> + return 1; >> + >> static_call(kvm_x86_set_cr0)(vcpu, cr0); >> >> kvm_post_set_cr0(vcpu, old_cr0, cr0); >> @@ -1210,6 +1213,9 @@ int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4) >> return 1; >> } >> >> + if ((cr4 & X86_CR4_CET) && !kvm_is_cr0_bit_set(vcpu, X86_CR0_WP)) >> + return 1; >> + >> static_call(kvm_x86_set_cr4)(vcpu, cr4); >> >> kvm_post_set_cr4(vcpu, old_cr4, cr4); >> -- >> 2.27.0 >>
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