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SubjectRe: [PATCH v5 3/3] PCI: qcom-ep: Add ICC bandwidth voting support
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On 6/27/2023 12:05 PM, Pavan Kondeti wrote:
> On Tue, Jun 27, 2023 at 06:31:31AM +0530, Krishna chaitanya chundru wrote:
>> +static void qcom_pcie_ep_icc_update(struct qcom_pcie_ep *pcie_ep)
>> +{
>> + struct dw_pcie *pci = &pcie_ep->pci;
>> + u32 offset, status, bw;
>> + int speed, width;
>> + int ret;
>> +
>> + if (!pcie_ep->icc_mem)
>> + return;
>> +
> Is this check needed? interconnect is added as required property and
> probe is failed if interconnect get fails. qcom_pcie_enable_resources()
> which gets called before enabling this interrupt is assuming that
> interconnect available.
>
>
>> + offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
>> + status = readw(pci->dbi_base + offset + PCI_EXP_LNKSTA);
>> +
>> + speed = FIELD_GET(PCI_EXP_LNKSTA_CLS, status);
>> + width = FIELD_GET(PCI_EXP_LNKSTA_NLW, status);
>> +
>> + switch (speed) {
>> + case 1:
>> + bw = MBps_to_icc(PCIE_GEN1_BW_MBPS);
>> + break;
>> + case 2:
>> + bw = MBps_to_icc(PCIE_GEN2_BW_MBPS);
>> + break;
>> + case 3:
>> + bw = MBps_to_icc(PCIE_GEN3_BW_MBPS);
>> + break;
>> + default:
>> + dev_warn(pci->dev, "using default GEN4 bandwidth\n");
>> + fallthrough;
>> + case 4:
>> + bw = MBps_to_icc(PCIE_GEN4_BW_MBPS);
>> + break;
>> + }
>> +
>> + ret = icc_set_bw(pcie_ep->icc_mem, 0, width * bw);
>> + if (ret) {
>> + dev_err(pci->dev, "failed to set interconnect bandwidth: %d\n",
>> + ret);
>> + }
> Are you not seeing the below warning from checkpatch?
>
> WARNING: braces {} are not necessary for single statement blocks

checkpatch is not giving warnings for this.

I removed the braces.

-KC

>> +}
>> +
>> static int qcom_pcie_enable_resources(struct qcom_pcie_ep *pcie_ep)
>> {
>> int ret;
>> + struct dw_pcie *pci = &pcie_ep->pci;
>>
>> ret = clk_bulk_prepare_enable(pcie_ep->num_clks, pcie_ep->clks);
>> if (ret)
>> @@ -277,6 +331,20 @@ static int qcom_pcie_enable_resources(struct qcom_pcie_ep *pcie_ep)
>> if (ret)
>> goto err_phy_exit;
>>
>> + /*
>> + * Some Qualcomm platforms require interconnect bandwidth constraints
>> + * to be set before enabling interconnect clocks.
>> + *
>> + * Set an initial peak bandwidth corresponding to single-lane Gen 1
>> + * for the pcie-mem path.
>> + */
>> + ret = icc_set_bw(pcie_ep->icc_mem, 0, MBps_to_icc(PCIE_GEN1_BW_MBPS));
>> + if (ret) {
>> + dev_err(pci->dev, "failed to set interconnect bandwidth: %d\n",
>> + ret);
>> + goto err_phy_exit;
>> + }
>> +
>> return 0;
> Thanks,
> Pavan

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