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    SubjectRe: [PATCH v1 5/5] riscv: dts: starfive: Add JH7110 PWM-DAC support
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    On 2023/6/26 19:09, Hal Feng wrote:
    > Add PWM-DAC support for StarFive JH7110 SoC.
    >
    > Signed-off-by: Hal Feng <hal.feng@starfivetech.com>

    Reviewed-by: Walker Chen <walker.chen@starfivetech.com>

    > ---
    > .../jh7110-starfive-visionfive-2.dtsi | 50 +++++++++++++++++++
    > arch/riscv/boot/dts/starfive/jh7110.dtsi | 13 +++++
    > 2 files changed, 63 insertions(+)
    >
    > diff --git a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
    > index 19b5954ee72d..5ca66a65e722 100644
    > --- a/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
    > +++ b/arch/riscv/boot/dts/starfive/jh7110-starfive-visionfive-2.dtsi
    > @@ -36,6 +36,34 @@ gpio-restart {
    > gpios = <&sysgpio 35 GPIO_ACTIVE_HIGH>;
    > priority = <224>;
    > };
    > +
    > + pwmdac_dit: pwmdac-dit {
    > + compatible = "starfive,jh7110-pwmdac-dit";
    > + #sound-dai-cells = <0>;
    > + };
    > +
    > + sound {
    > + compatible = "simple-audio-card";
    > + simple-audio-card,name = "StarFive-PWMDAC-Sound-Card";
    > + #address-cells = <1>;
    > + #size-cells = <0>;
    > +
    > + simple-audio-card,dai-link@0 {
    > + reg = <0>;
    > + format = "left_j";
    > + bitclock-master = <&sndcpu0>;
    > + frame-master = <&sndcpu0>;
    > + status = "okay";
    > +
    > + sndcpu0: cpu {
    > + sound-dai = <&pwmdac>;
    > + };
    > +
    > + codec {
    > + sound-dai = <&pwmdac_dit>;
    > + };
    > + };
    > + };
    > };
    >
    > &dvp_clk {
    > @@ -191,6 +219,22 @@ GPOEN_SYS_I2C6_DATA,
    > };
    > };
    >
    > + pwmdac_pins: pwmdac-0 {
    > + pwmdac-pins {
    > + pinmux = <GPIOMUX(33, GPOUT_SYS_PWMDAC_LEFT,
    > + GPOEN_ENABLE,
    > + GPI_NONE)>,
    > + <GPIOMUX(34, GPOUT_SYS_PWMDAC_RIGHT,
    > + GPOEN_ENABLE,
    > + GPI_NONE)>;
    > + bias-disable;
    > + drive-strength = <2>;
    > + input-disable;
    > + input-schmitt-disable;
    > + slew-rate = <0>;
    > + };
    > + };
    > +
    > uart0_pins: uart0-0 {
    > tx-pins {
    > pinmux = <GPIOMUX(5, GPOUT_SYS_UART0_TX,
    > @@ -250,6 +294,12 @@ GPOEN_DISABLE,
    > };
    > };
    >
    > +&pwmdac {
    > + pinctrl-names = "default";
    > + pinctrl-0 = <&pwmdac_pins>;
    > + status = "okay";
    > +};
    > +
    > &uart0 {
    > pinctrl-names = "default";
    > pinctrl-0 = <&uart0_pins>;
    > diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
    > index cfda6fb0d91b..bbb3f65e6f80 100644
    > --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
    > +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
    > @@ -387,6 +387,19 @@ tdm: tdm@10090000 {
    > status = "disabled";
    > };
    >
    > + pwmdac: pwmdac@100b0000 {
    > + compatible = "starfive,jh7110-pwmdac";
    > + reg = <0x0 0x100b0000 0x0 0x1000>;
    > + clocks = <&syscrg JH7110_SYSCLK_PWMDAC_APB>,
    > + <&syscrg JH7110_SYSCLK_PWMDAC_CORE>;
    > + clock-names = "apb", "core";
    > + resets = <&syscrg JH7110_SYSRST_PWMDAC_APB>;
    > + dmas = <&dma 22>;
    > + dma-names = "tx";
    > + #sound-dai-cells = <0>;
    > + status = "disabled";
    > + };
    > +
    > stgcrg: clock-controller@10230000 {
    > compatible = "starfive,jh7110-stgcrg";
    > reg = <0x0 0x10230000 0x0 0x10000>;

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