Messages in this thread | ![/](/images/icornerl.gif) | | Date | Thu, 22 Jun 2023 07:22:37 +0530 | Subject | Re: [PATCH V12 05/10] arm64/perf: Add branch stack support in ARMV8 PMU | From | Anshuman Khandual <> |
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On 6/19/23 14:38, Marc Zyngier wrote: > On Mon, 19 Jun 2023 06:45:07 +0100, > Anshuman Khandual <anshuman.khandual@arm.com> wrote: >> >> >> >> On 6/16/23 14:51, Catalin Marinas wrote: >>> On Fri, Jun 16, 2023 at 06:57:52AM +0530, Anshuman Khandual wrote: >>>> On 6/16/23 05:12, kernel test robot wrote: >>>>> kernel test robot noticed the following build errors: >>>>> >>>>> [auto build test ERROR on arm64/for-next/core] >>>>> [also build test ERROR on tip/perf/core acme/perf/core linus/master v6.4-rc6 next-20230615] >>>>> [If your patch is applied to the wrong git tree, kindly drop us a note. >>>>> And when submitting patch, we suggest to use '--base' as documented in >>>>> https://git-scm.com/docs/git-format-patch#_base_tree_information] >>>>> >>>>> url: https://github.com/intel-lab-lkp/linux/commits/Anshuman-Khandual/drivers-perf-arm_pmu-Add-new-sched_task-callback/20230615-223352 >>>>> base: https://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git for-next/core >>>>> patch link: https://lore.kernel.org/r/20230615133239.442736-6-anshuman.khandual%40arm.com >>>>> patch subject: [PATCH V12 05/10] arm64/perf: Add branch stack support in ARMV8 PMU >>>>> config: arm-randconfig-r004-20230615 (https://download.01.org/0day-ci/archive/20230616/202306160706.Uei5XDoi-lkp@intel.com/config) >>>>> compiler: clang version 17.0.0 (https://github.com/llvm/llvm-project.git 4a5ac14ee968ff0ad5d2cc1ffa0299048db4c88a) >>>>> reproduce (this is a W=1 build): >>>>> mkdir -p ~/bin >>>>> wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross >>>>> chmod +x ~/bin/make.cross >>>>> # install arm cross compiling tool for clang build >>>>> # apt-get install binutils-arm-linux-gnueabi >>>>> git remote add arm64 https://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git >>>>> git fetch arm64 for-next/core >>>>> git checkout arm64/for-next/core >>>>> b4 shazam https://lore.kernel.org/r/20230615133239.442736-6-anshuman.khandual@arm.com >>>>> # save the config file >>>>> mkdir build_dir && cp config build_dir/.config >>>>> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang ~/bin/make.cross W=1 O=build_dir ARCH=arm olddefconfig >>>>> COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang ~/bin/make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash drivers/perf/ >>>> >>>> I am unable to reproduce this on mainline 6.4-rc6 via default cross compiler >>>> on a W=1 build. Looking at all other problems reported on the file, it seems >>>> something is not right here. Reported build problems around these callbacks, >>>> i.e armv8pmu_branch_XXXX() do not make sense as they are available via config >>>> CONFIG_PERF_EVENTS which is also enabled along with CONFIG_ARM_PMUV3 in this >>>> test config. >>> >>> Have you tried applying this series on top of the arm64 for-next/core >>> branch? That's what the robot it testing (in the absence of a --base >>> option when generating the patches). >> >> Right, it turned out to be a build problem on arm (32 bit) platform instead. >> After arm_pmuv3.c moved into common ./drivers/perf from ./arch/arm64/kernel/, >> it can no longer access arch/arm64/include/asm/perf_event.h defined functions >> without breaking arm (32) bit. The following code block needs to be moved out >> from arch/arm64/include/asm/perf_event.h into include/linux/perf/arm_pmuv3.h >> (which is preferred as all call sites are inside drivers/perf/arm_pmuv3.c) or >> may be arm_pmu.h (which is one step higher in the abstraction). > > No, that's the wrong approach. The 32bit backend must have its own > stubs for the stuff it implements or not.
Okay.
> > Just add something like the patch below, and please *test* that a > 32bit VM using PMUv3 doesn't have any regression.
Sure.
> > Thanks, > > M. > >>From 017362ca518e6d6ac3262514d1f7f27e73232799 Mon Sep 17 00:00:00 2001 > From: Marc Zyngier <maz@kernel.org> > Date: Mon, 19 Jun 2023 10:05:52 +0100 > Subject: [PATCH] 32bit hack > > Signed-off-by: Marc Zyngier <maz@kernel.org> > --- > arch/arm/include/asm/arm_pmuv3.h | 18 ++++++++++++++++++ > 1 file changed, 18 insertions(+) > > diff --git a/arch/arm/include/asm/arm_pmuv3.h b/arch/arm/include/asm/arm_pmuv3.h > index f4db3e75d75f..c4bcb7a18267 100644 > --- a/arch/arm/include/asm/arm_pmuv3.h > +++ b/arch/arm/include/asm/arm_pmuv3.h > @@ -244,4 +244,22 @@ static inline bool is_pmuv3p5(int pmuver) > return pmuver >= ARMV8_PMU_DFR_VER_V3P5; > } > > +/* BRBE stubs */
These stubs also need to be wrapped around with #ifdef CONFIG_PERF_EVENTS
> +static inline void armv8pmu_branch_enable(struct perf_event *event) { } > +static inline void armv8pmu_branch_disable(struct perf_event *event) { } > +static inline void armv8pmu_branch_read(struct pmu_hw_events * cpuc, > + struct perf_event *event) { } > +static inline void armv8pmu_branch_save(struct arm_pmu *armpmu, void *ctx) {} > +static inline void armv8pmu_branch_reset(void) {} > +static inline bool armv8pmu_branch_attr_valid(struct perf_event *event) > +{ > + return false; > +} > +static inline void armv8pmu_branch_probe(struct arm_pmu *armpmu) {} > +static inline int armv8pmu_task_ctx_cache_alloc(struct arm_pmu *armpmu) > +{ > + return 0; > +} > +static inline void armv8pmu_task_ctx_cache_free(struct arm_pmu *armpmu) {} > + > #endif
Sure, will make all the necessary changes.
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