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    Subject[PATCH 3/3] arm64: dts: qcom: sm8350: add APR and LPASS TLMM
    Date
    Add audio-related nodes: the APR in the ADSP (same as on SM8250) and
    LPASS TLMM pin controller.

    Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

    ---

    Bindings for SM8350:
    https://lore.kernel.org/linux-arm-msm/20230616185742.2250452-1-krzysztof.kozlowski@linaro.org/T/#t
    ---
    arch/arm64/boot/dts/qcom/sm8350.dtsi | 82 ++++++++++++++++++++++++++++
    1 file changed, 82 insertions(+)

    diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi
    index 33b7ef8fd78a..9650cecb1370 100644
    --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi
    +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi
    @@ -15,7 +15,9 @@
    #include <dt-bindings/mailbox/qcom-ipcc.h>
    #include <dt-bindings/phy/phy-qcom-qmp.h>
    #include <dt-bindings/power/qcom-rpmpd.h>
    +#include <dt-bindings/soc/qcom,apr.h>
    #include <dt-bindings/soc/qcom,rpmh-rsc.h>
    +#include <dt-bindings/sound/qcom,q6afe.h>
    #include <dt-bindings/thermal/thermal.h>
    #include <dt-bindings/interconnect/qcom,sm8350.h>

    @@ -1780,6 +1782,20 @@ tcsr_mutex: hwlock@1f40000 {
    #hwlock-cells = <1>;
    };

    + lpass_tlmm: pinctrl@33c0000 {
    + compatible = "qcom,sm8350-lpass-lpi-pinctrl";
    + reg = <0 0x033c0000 0x0 0x20000>,
    + <0 0x03550000 0x0 0x10000>;
    +
    + clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
    + <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
    + clock-names = "core", "audio";
    +
    + gpio-controller;
    + #gpio-cells = <2>;
    + gpio-ranges = <&lpass_tlmm 0 0 15>;
    + };
    +
    gpu: gpu@3d00000 {
    compatible = "qcom,adreno-660.1", "qcom,adreno";

    @@ -3189,6 +3205,72 @@ IPCC_MPROC_SIGNAL_GLINK_QMP
    label = "lpass";
    qcom,remote-pid = <2>;

    + apr {
    + compatible = "qcom,apr-v2";
    + qcom,glink-channels = "apr_audio_svc";
    + qcom,domain = <APR_DOMAIN_ADSP>;
    + #address-cells = <1>;
    + #size-cells = <0>;
    +
    + service@3 {
    + reg = <APR_SVC_ADSP_CORE>;
    + compatible = "qcom,q6core";
    + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
    + };
    +
    + q6afe: service@4 {
    + compatible = "qcom,q6afe";
    + reg = <APR_SVC_AFE>;
    + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
    + q6afedai: dais {
    + compatible = "qcom,q6afe-dais";
    + #address-cells = <1>;
    + #size-cells = <0>;
    + #sound-dai-cells = <1>;
    + };
    +
    + q6afecc: clock-controller {
    + compatible = "qcom,q6afe-clocks";
    + #clock-cells = <2>;
    + };
    + };
    +
    + q6asm: service@7 {
    + compatible = "qcom,q6asm";
    + reg = <APR_SVC_ASM>;
    + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
    + q6asmdai: dais {
    + compatible = "qcom,q6asm-dais";
    + #address-cells = <1>;
    + #size-cells = <0>;
    + #sound-dai-cells = <1>;
    + iommus = <&apps_smmu 0x1801 0x0>;
    +
    + dai@0 {
    + reg = <0>;
    + };
    +
    + dai@1 {
    + reg = <1>;
    + };
    +
    + dai@2 {
    + reg = <2>;
    + };
    + };
    + };
    +
    + q6adm: service@8 {
    + compatible = "qcom,q6adm";
    + reg = <APR_SVC_ADM>;
    + qcom,protection-domain = "avs/audio", "msm/adsp/audio_pd";
    + q6routing: routing {
    + compatible = "qcom,q6adm-routing";
    + #sound-dai-cells = <0>;
    + };
    + };
    + };
    +
    fastrpc {
    compatible = "qcom,fastrpc";
    qcom,glink-channels = "fastrpcglink-apps-dsp";
    --
    2.34.1
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