| Date | Wed, 14 Jun 2023 13:27:23 +0200 | Subject | Re: [PATCH v2 06/15] dt-bindings: reset: mt8188: Add VDOSYS0 reset control bits | From | AngeloGioacchino Del Regno <> |
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Il 14/06/23 09:31, Hsiao Chien Sung ha scritto: > Add MT8188 VDOSYS0 reset control bits. > > Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
Now they're sequential and starting from 0. Totally valid.
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
> --- > include/dt-bindings/reset/mt8188-resets.h | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/include/dt-bindings/reset/mt8188-resets.h b/include/dt-bindings/reset/mt8188-resets.h > index 377cdfda82a9..1d92759dc67d 100644 > --- a/include/dt-bindings/reset/mt8188-resets.h > +++ b/include/dt-bindings/reset/mt8188-resets.h > @@ -33,4 +33,24 @@ > > #define MT8188_TOPRGU_SW_RST_NUM 24 > > +#define MT8188_VDO0_RST_DISP_OVL0 0 > +#define MT8188_VDO0_RST_FAKE_ENG0 1 > +#define MT8188_VDO0_RST_DISP_CCORR0 2 > +#define MT8188_VDO0_RST_DISP_MUTEX0 3 > +#define MT8188_VDO0_RST_DISP_GAMMA0 4 > +#define MT8188_VDO0_RST_DISP_DITHER0 5 > +#define MT8188_VDO0_RST_DISP_WDMA0 6 > +#define MT8188_VDO0_RST_DISP_RDMA0 7 > +#define MT8188_VDO0_RST_DSI0 8 > +#define MT8188_VDO0_RST_DSI1 9 > +#define MT8188_VDO0_RST_DSC_WRAP0 10 > +#define MT8188_VDO0_RST_VPP_MERGE0 11 > +#define MT8188_VDO0_RST_DP_INTF0 12 > +#define MT8188_VDO0_RST_DISP_AAL0 13 > +#define MT8188_VDO0_RST_INLINEROT0 14 > +#define MT8188_VDO0_RST_APB_BUS 15 > +#define MT8188_VDO0_RST_DISP_COLOR0 16 > +#define MT8188_VDO0_RST_MDP_WROT0 17 > +#define MT8188_VDO0_RST_DISP_RSZ0 18 > + > #endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8188 */ > -- > 2.18.0 >
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