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    SubjectRe: [PATCH 1/2] sh: dma: fix `dmaor_read_reg`/`dmaor_write_reg` macros
    Hi Adrian,

    On Mon, May 8, 2023 at 1:28 PM John Paul Adrian Glaubitz
    <glaubitz@physik.fu-berlin.de> wrote:
    > On Mon, 2023-05-08 at 13:20 +0200, Geert Uytterhoeven wrote:
    > > Looks like this is still broken on e.g. SH7751R, which has 8 channels,
    > > both handled by a single DMAOR register at offset 0x40...
    > >
    > > While e.g. dma_base_addr() seems to have some provision for this
    > > (cfr. the "chan >= 9" (not "8") check), dma_find_base() will fail, as
    > > arch/sh/include/cpu-sh4/cpu/dma.h defines SH_DMAC_BASE1.
    > > Anyway, that's not new, so I have no objection to your patch.
    >
    > Was SH7751R broken by 7f47c7189b3e8f19 as well?

    I think so.
    Before, the code to use 1 or 2 DMA engine relied on the presence of
    DMAE1_IRQ, which is/was defined in arch/sh/include/cpu-sh4a/cpu/dma.h,
    but not in arch/sh/include/cpu-sh4/cpu/dma.h.

    It might be sufficient to fix this by just dropping the SH_DMAC_BASE1
    definition from arch/sh/include/cpu-sh4/cpu/dma.h. I'm actually
    wondering why it was added (in commit 71b973a42c545682 ("sh: dma-sh
    updates for multi IRQ and new SH-4A CPUs.")), because it looks like
    none of the SH4-based (not SH4A!) SoCs have a second base...

    Gr{oetje,eeting}s,

    Geert

    --
    Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

    In personal conversations with technical people, I call myself a hacker. But
    when I'm talking to journalists I just say "programmer" or something like that.
    -- Linus Torvalds

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