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SubjectRe: [PATCH v2 0/7] drm: sun4i: set proper TCON0 DCLK rate in DSI mode
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Hello everyone,

I apologize for my absence from the discussion during past week, I got
hit with tonsillitis.

On Mon May 1, 2023 at 3:40 PM CEST, Frank Oltmanns wrote:
> Looking at ccu_nkm_determine_rate(), we've found our culprit because it
> does not try parent clock rates other than the current one. The same
> applies to all other ccu_nkm_* functions.

Yes, that's why I dropped CLK_SET_RATE_PARENT from pll-mipi in v3.

> b. Add functionality to ccu_nkm_* to also update the parent clock rate.
>
> I'm actually interested in tackling b, but I can't make any promises as
> to if and when I'll be able to solve it. I'm not certain about any side
> effects this might have.

It sounds like an interesting exercise. But what if HDMI is then added
to the mix?

Best regards
Roman

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