Messages in this thread | | | Subject | Re: [PATCH] MIPS: Fix MIPS_O32_FP64_SUPPORT for 64bit CPUs before R2 | From | Jiaxun Yang <> | Date | Fri, 19 May 2023 23:02:47 +0100 |
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> 2023年5月19日 21:10,Maciej W. Rozycki <macro@orcam.me.uk> 写道: > > On Fri, 19 May 2023, Jiaxun Yang wrote: > >> MIPS_O32_FP64_SUPPORT enables possibility of using all 32 FPRs on 32bit >> kernel in case CPU implemented FR1. As FR1 is present on all 64bit CPUs >> following R4000's priviliged spec, there is no reason to limit such support >> to R2+ CPUs. > > I guess one can do it and still run FPXX software, but I fail to see what > gain it provides. For FP32 it breaks things as accesses to odd-numbered > FPRs will no longer get at the high part of a double value and for FP64 > there are no MTHC1/MFHC1 instructions required to access the high part.
Actually software may access the high part by SDC1/LDC1. FP32 binaries are still going to run at FR0 mode.
> > What problem are you trying to solve? And how did you verify this patch?
Was trying to deal a proprietary JIT software who want to enable FR1 via prctl on Loongson-2F with 32 bit kernel.
> >> --- a/arch/mips/kernel/fpu-probe.c >> +++ b/arch/mips/kernel/fpu-probe.c >> @@ -289,6 +289,23 @@ void cpu_set_fpu_opts(struct cpuinfo_mips *c) >> c->options |= MIPS_CPU_FRE; >> } >> >> + /* Fix up FIR for FPU earlier than R2 */ >> + if (!cpu_has_mips_r2_r6) { >> + c->fpu_id |= MIPS_FPIR_S; >> +#ifdef CONFIG_CPU_R4K_FPU >> + /* All known R4000 class FPU implemented double */ >> + c->fpu_id |= MIPS_FPIR_D; >> +#endif > > Currently all FPUs we support implement double and we require that, so no > need to make this piece conditional (I would use IS_ENABLED otherwise, so > as not to clutter the source with #ifdef), but `c->fpu_id' is also exposed > to the user via ptrace(2), so this has to reflect hardware and not give a > synthesized value.
Alas, I thought R2030 class FPU does not have double? Since MIPS-IV spec says SDC1 is introduced in MIPS II.
Thanks Jiaxun
> > Maciej
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