Messages in this thread | | | From | Jernej Škrabec <> | Subject | Re: [PATCH v4 2/4] ARM: dts: sunxi: rename tcon's clock output | Date | Thu, 18 May 2023 23:09:13 +0200 |
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Dne petek, 05. maj 2023 ob 07:21:08 CEST je Roman Beranek napisal(a): > While the rate of TCON0's DCLK matches dotclock for parallel and LVDS > outputs, this doesn't hold for DSI. According manuals from Allwinner, > DCLK is an abbreviation of Data Clock, not dotclock, so go with that > instead. > > Signed-off-by: Roman Beranek <me@crly.cz>
Applied, thanks!
Best regards, Jernej
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