Messages in this thread | | | Date | Mon, 15 May 2023 14:53:07 +0800 | Subject | Re: [RFC PATCH v2 02/11] KVM: x86: Advertise CPUID.7.2.EDX and RRSBA_CTRL support | From | Xiaoyao Li <> |
| |
On 4/14/2023 2:25 PM, Chao Gao wrote: > From: Zhang Chen <chen.zhang@intel.com> > > Add a kvm-only CPUID feature leaf for CPUID.7.2.EDX and RRSBA_CTRL > as the first feature in the leaf. > > RRSBA_CTRL is enumerated by CPUID.7.2.EDX[2]. If supported, RRSBA_DIS_U > (bit 5) and RRSBA_DIS_S (bit 6) of IA32_SPEC_CTRL MSR can be used to > disable RRSBA behavior for CPL3 and CPL0/1/2 respectively. > > Note that KVM does not intercept guests' IA32_SPEC_CTRL MSR accesses > after a non-zero is written to the MSR. Therefore, guests can already > toggle the two bits if the host supports RRSBA_CTRL, and no extra code > is needed to allow guests to toggle the two bits.
This is a bug that also matters with other bits in MSR_IA32_SPEC_CTRL which has a dedicated enumeration CPUID bit and no support in KVM yet.
I think we need to fix this bug at first.
> Signed-off-by: Zhang Chen <chen.zhang@intel.com> > Signed-off-by: Chao Gao <chao.gao@intel.com> > Tested-by: Jiaan Lu <jiaan.lu@intel.com> > --- > arch/x86/kvm/cpuid.c | 22 +++++++++++++++++++--- > arch/x86/kvm/reverse_cpuid.h | 7 +++++++ > 2 files changed, 26 insertions(+), 3 deletions(-) > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c > index 9583a110cf5f..f024c3ac2203 100644 > --- a/arch/x86/kvm/cpuid.c > +++ b/arch/x86/kvm/cpuid.c > @@ -685,6 +685,10 @@ void kvm_set_cpu_caps(void) > SF(SGX1) | SF(SGX2) | SF(SGX_EDECCSSA) > ); > > + kvm_cpu_cap_init_kvm_defined(CPUID_7_2_EDX, > + SF(RRSBA_CTRL) > + ); > +
Please move this hook up to right follow the leaf CPUID_7_1_EAX.
> kvm_cpu_cap_mask(CPUID_8000_0001_ECX, > F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ | > F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) | > @@ -949,13 +953,14 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) > break; > /* function 7 has additional index. */ > case 7: > - entry->eax = min(entry->eax, 1u); > + entry->eax = min(entry->eax, 2u); > cpuid_entry_override(entry, CPUID_7_0_EBX); > cpuid_entry_override(entry, CPUID_7_ECX); > cpuid_entry_override(entry, CPUID_7_EDX); > > - /* KVM only supports 0x7.0 and 0x7.1, capped above via min(). */ > - if (entry->eax == 1) { > + max_idx = entry->eax; > + > + if (max_idx >= 1) { > entry = do_host_cpuid(array, function, 1); > if (!entry) > goto out; > @@ -965,6 +970,17 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) > entry->ebx = 0; > entry->ecx = 0; > } > + > + if (max_idx >= 2) { > + entry = do_host_cpuid(array, function, 2); > + if (!entry) > + goto out; > + > + cpuid_entry_override(entry, CPUID_7_2_EDX); > + entry->eax = 0; > + entry->ebx = 0; > + entry->ecx = 0; > + } > break; > case 0xa: { /* Architectural Performance Monitoring */ > union cpuid10_eax eax; > diff --git a/arch/x86/kvm/reverse_cpuid.h b/arch/x86/kvm/reverse_cpuid.h > index a5717282bb9c..72bad8314a9c 100644 > --- a/arch/x86/kvm/reverse_cpuid.h > +++ b/arch/x86/kvm/reverse_cpuid.h > @@ -15,6 +15,7 @@ enum kvm_only_cpuid_leafs { > CPUID_12_EAX = NCAPINTS, > CPUID_7_1_EDX, > CPUID_8000_0007_EDX, > + CPUID_7_2_EDX, > NR_KVM_CPU_CAPS, > > NKVMCAPINTS = NR_KVM_CPU_CAPS - NCAPINTS, > @@ -47,6 +48,9 @@ enum kvm_only_cpuid_leafs { > /* CPUID level 0x80000007 (EDX). */ > #define KVM_X86_FEATURE_CONSTANT_TSC KVM_X86_FEATURE(CPUID_8000_0007_EDX, 8) > > +/* Intel-defined sub-features, CPUID level 0x00000007:2 (EDX) */ > +#define KVM_X86_FEATURE_RRSBA_CTRL KVM_X86_FEATURE(CPUID_7_2_EDX, 2) > + > struct cpuid_reg { > u32 function; > u32 index; > @@ -69,6 +73,7 @@ static const struct cpuid_reg reverse_cpuid[] = { > [CPUID_8000_0007_EBX] = {0x80000007, 0, CPUID_EBX}, > [CPUID_7_EDX] = { 7, 0, CPUID_EDX}, > [CPUID_7_1_EAX] = { 7, 1, CPUID_EAX}, > + [CPUID_7_2_EDX] = { 7, 2, CPUID_EDX}, > [CPUID_12_EAX] = {0x00000012, 0, CPUID_EAX}, > [CPUID_8000_001F_EAX] = {0x8000001f, 0, CPUID_EAX}, > [CPUID_7_1_EDX] = { 7, 1, CPUID_EDX}, > @@ -108,6 +113,8 @@ static __always_inline u32 __feature_translate(int x86_feature) > return KVM_X86_FEATURE_SGX_EDECCSSA; > else if (x86_feature == X86_FEATURE_CONSTANT_TSC) > return KVM_X86_FEATURE_CONSTANT_TSC; > + else if (x86_feature == X86_FEATURE_RRSBA_CTRL) > + return KVM_X86_FEATURE_RRSBA_CTRL; > > return x86_feature; > }
| |