Messages in this thread Patch in this message | | | From | arinc9.unal@gmail ... | Subject | [RFC PATCH v2 net-next 06/14] net: dsa: mt7530: do not set CPU port interfaces to PHY_INTERFACE_MODE_NA | Date | Fri, 7 Apr 2023 16:46:18 +0300 |
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From: Arınç ÜNAL <arinc.unal@arinc9.com>
There is no need to set priv->p5_interface and priv->p6_interface to PHY_INTERFACE_MODE_NA on mt7530_setup() and mt7531_setup().
As Vladimir explained, in include/linux/phy.h we have:
typedef enum { PHY_INTERFACE_MODE_NA,
In lack of other initialiser, the first element of an enum gets the value 0 in C.
Then, "priv" is allocated by this driver with devm_kzalloc(), which means that its entire memory is zero-filled. So priv->p5_interface and priv->p6_interface are already set to 0, PHY_INTERFACE_MODE_NA.
There is no code path between the devm_kzalloc(), and the position in mt7530_setup() and mt7531_setup() that would change the value of priv->p5_interface or priv->p6_interface from 0.
The only place they are modified is mt753x_phylink_mac_config() but mt753x_phylink_mac_config() runs after mt753x_setup(), as can be seen on the code path below.
mt7530_probe() -> dsa_register_switch() -> dsa_switch_probe() -> dsa_tree_setup() -> dsa_tree_setup_switches() -> dsa_switch_setup() -> ds->ops->setup(): mt753x_setup() -> dsa_tree_setup_ports() -> dsa_port_setup() [...] -> dsa_port_phylink_create() [...] -> phylink_mac_config() -> pl->mac_ops->mac_config(): dsa_port_phylink_mac_config() -> ds->ops->phylink_mac_config(): mt753x_phylink_mac_config()
Therefore, do not put 0 into a variable containing 0.
Tested-by: Arınç ÜNAL <arinc.unal@arinc9.com> Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> --- drivers/net/dsa/mt7530.c | 6 ------ 1 file changed, 6 deletions(-)
diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index 8a47dcb96cdf..fc5428baa905 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2247,8 +2247,6 @@ mt7530_setup(struct dsa_switch *ds) val |= MHWTRAP_MANUAL; mt7530_write(priv, MT7530_MHWTRAP, val); - priv->p6_interface = PHY_INTERFACE_MODE_NA; - /* Enable and reset MIB counters */ mt7530_mib_reset(ds); @@ -2466,10 +2464,6 @@ mt7531_setup(struct dsa_switch *ds) mt7530_rmw(priv, MT7531_GPIO_MODE0, MT7531_GPIO0_MASK, MT7531_GPIO0_INTERRUPT); - /* Let phylink decide the interface later. */ - priv->p5_interface = PHY_INTERFACE_MODE_NA; - priv->p6_interface = PHY_INTERFACE_MODE_NA; - /* Enable PHY core PLL, since phy_device has not yet been created * provided for phy_[read,write]_mmd_indirect is called, we provide * our own mt7531_ind_mmd_phy_[read,write] to complete this -- 2.37.2
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