Messages in this thread | | | Date | Fri, 28 Apr 2023 20:30:58 -0700 | Subject | Re: [PATCH v2 0/7] add DSC 1.2 dpu supports | From | Abhinav Kumar <> |
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On 4/28/2023 8:12 PM, Dmitry Baryshkov wrote: > On Sat, 29 Apr 2023 at 05:51, Abhinav Kumar <quic_abhinavk@quicinc.com> wrote: >> >> >> >> On 4/28/2023 7:46 PM, Dmitry Baryshkov wrote: >>> On Sat, 29 Apr 2023 at 02:45, Kuogee Hsieh <quic_khsieh@quicinc.com> wrote: >>>> >>>> This series adds the DPU side changes to support DSC 1.2 encoder. This >>>> was validated with both DSI DSC 1.2 panel and DP DSC 1.2 monitor. >>>> The DSI and DP parts will be pushed later on top of this change. >>>> This seriel is rebase on [1], [2] and catalog fixes from [3]. >>>> >>>> [1]: https://patchwork.freedesktop.org/series/116851/ >>>> [2]: https://patchwork.freedesktop.org/series/116615/ >>>> [3]: https://patchwork.freedesktop.org/series/112332/ >>>> >>>> Abhinav Kumar (2): >>>> drm/msm/dpu: add DSC 1.2 hw blocks for relevant chipsets >>>> drm/msm/dpu: add dsc blocks for remaining chipsets in catalog >>>> >>>> Kuogee Hsieh (5): >>>> drm/msm/dpu: add support for DSC encoder v1.2 engine >>>> drm/msm/dpu: separate DSC flush update out of interface >>>> drm/msm/dpu: add DPU_PINGPONG_DSC feature PP_BLK and PP_BLK_TE >>>> drm/msm/dpu: save dpu topology configuration >>>> drm/msm/dpu: calculate DSC encoder parameters dynamically >>> >>> Another generic comment: this patchset doesn't have discussed RM >>> changes to allocate DSC blocks in proper pairs as required by DCE. >>> >> >> We have already made that change. It will be pushed with the DP series >> because today DSC only support 2-2-1 so they will always be allocated in >> pairs. > > Then there is no reason to touch the dpu_encoder in this series as the > topology is also known to be 2:2:1. >
Agreed, no concerns with that.
>> >>>> >>>> drivers/gpu/drm/msm/Makefile | 1 + >>>> .../drm/msm/disp/dpu1/catalog/dpu_3_0_msm8998.h | 19 +- >>>> .../gpu/drm/msm/disp/dpu1/catalog/dpu_4_0_sdm845.h | 8 +- >>>> .../gpu/drm/msm/disp/dpu1/catalog/dpu_5_0_sm8150.h | 26 +- >>>> .../drm/msm/disp/dpu1/catalog/dpu_5_1_sc8180x.h | 35 ++- >>>> .../gpu/drm/msm/disp/dpu1/catalog/dpu_6_0_sm8250.h | 26 +- >>>> .../gpu/drm/msm/disp/dpu1/catalog/dpu_6_2_sc7180.h | 4 +- >>>> .../gpu/drm/msm/disp/dpu1/catalog/dpu_6_3_sm6115.h | 2 +- >>>> .../drm/msm/disp/dpu1/catalog/dpu_6_5_qcm2290.h | 2 +- >>>> .../gpu/drm/msm/disp/dpu1/catalog/dpu_7_0_sm8350.h | 14 + >>>> .../gpu/drm/msm/disp/dpu1/catalog/dpu_7_2_sc7280.h | 7 + >>>> .../drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 16 + >>>> .../gpu/drm/msm/disp/dpu1/catalog/dpu_8_1_sm8450.h | 14 + >>>> .../gpu/drm/msm/disp/dpu1/catalog/dpu_9_0_sm8550.h | 14 + >>>> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 102 ++++--- >>>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 35 ++- >>>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 36 ++- >>>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 22 +- >>>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 10 + >>>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.h | 14 +- >>>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc_1_2.c | 335 +++++++++++++++++++++ >>>> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 9 +- >>>> drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 7 +- >>>> 23 files changed, 642 insertions(+), 116 deletions(-) >>>> create mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc_1_2.c >>>> >>>> -- >>>> The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, >>>> a Linux Foundation Collaborative Project >>>> >>> >>> > > >
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