Messages in this thread Patch in this message | | | Date | Fri, 28 Apr 2023 14:20:39 +0200 | From | Andrew Jones <> | Subject | Re: [PATCH 1/1] perf: RISC-V: Limit the number of counters returned from SBI. |
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On Fri, Apr 28, 2023 at 11:02:56AM +0000, Viacheslav Mitrofanov wrote: > Perf gets the number of supported counters from SBI. If it happens that > the number of returned counters more than RISCV_MAX_COUNTERS the code > trusts it. It does not lead to an immediate problem but can potentially > lead to it. Prevent getting more than RISCV_MAX_COUNTERS from SBI.
I recall suggesting we do this during the KVM PMU review, but I guess we forgot.
> > Signed-off-by: Viacheslav Mitrofanov <v.v.mitrofanov@yadro.com> > --- > drivers/perf/riscv_pmu_sbi.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/perf/riscv_pmu_sbi.c b/drivers/perf/riscv_pmu_sbi.c > index 70cb50fd41c2..0183bf911bfb 100644 > --- a/drivers/perf/riscv_pmu_sbi.c > +++ b/drivers/perf/riscv_pmu_sbi.c > @@ -867,6 +867,11 @@ static int pmu_sbi_device_probe(struct platform_device *pdev) > pr_err("SBI PMU extension doesn't provide any counters\n"); > goto out_free; > }
Need blank line here
> + /* It is possible to get from SBI more than max number of counters */ > + if (num_counters > RISCV_MAX_COUNTERS) { > + pr_warn("SBI returned more than maximum number of counters\n"); ^ the
This should be a pr_info.
> + num_counters = RISCV_MAX_COUNTERS; > + } Otherwise,
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Thanks, drew
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