Messages in this thread Patch in this message | | | From | Heiko Stuebner <> | Subject | [PATCH 3/4] RISC-V: export the ISA string of the running machine in the aux vector | Date | Mon, 24 Apr 2023 21:49:10 +0200 |
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From: Heiko Stuebner <heiko.stuebner@vrull.eu>
Already defined aux-vectors regarding the machine type are AT_PLATFORM and AT_BASE_PLATFORM. PPC already uses AT_BASE_PLATFORM to identify the real platform the system is running on, so do a similar thing on RISC-V and export the ISA string of the running machine via this aux-vector element.
This way userspace can possibly adapt to extensions that allow it to run certain loads more performantly.
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu> --- arch/riscv/include/asm/elf.h | 10 ++++++++++ arch/riscv/kernel/cpu.c | 12 ++++++++++++ 2 files changed, 22 insertions(+)
diff --git a/arch/riscv/include/asm/elf.h b/arch/riscv/include/asm/elf.h index 30e7d2455960..820ef627e83d 100644 --- a/arch/riscv/include/asm/elf.h +++ b/arch/riscv/include/asm/elf.h @@ -78,6 +78,16 @@ extern unsigned long elf_hwcap; #define COMPAT_ELF_PLATFORM (NULL) +/* + * ELF_PLATFORM indicates the ISA supported by the platform, but has + * special meaning to ld.so . + * Expose the ISA string including all usable extensions via + * ELF_BASE_PLATFORM instead and allow userspace to adapt to them + * if needed. + */ +#define ELF_BASE_PLATFORM (riscv_base_platform) +extern const char *riscv_base_platform; + #ifdef CONFIG_MMU #define ARCH_DLINFO \ do { \ diff --git a/arch/riscv/kernel/cpu.c b/arch/riscv/kernel/cpu.c index 06c2f587a176..71770563199f 100644 --- a/arch/riscv/kernel/cpu.c +++ b/arch/riscv/kernel/cpu.c @@ -118,8 +118,12 @@ static int riscv_cpuinfo_starting(unsigned int cpu) return 0; } +const char *riscv_base_platform = NULL; +static char *riscv_create_isa_string(void); + static int __init riscv_cpuinfo_init(void) { + char *isa_str; int ret; ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "riscv/cpuinfo:starting", @@ -129,6 +133,14 @@ static int __init riscv_cpuinfo_init(void) return ret; } + /* + * Create the isa-string with the common set of extensions over + * all harts, to expose as AT_BASE_PLATFORM in the aux vector. + */ + isa_str = riscv_create_isa_string(); + if (!IS_ERR(isa_str)) + riscv_base_platform = isa_str; + return 0; } arch_initcall(riscv_cpuinfo_init); -- 2.39.0
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