Messages in this thread | | | Date | Thu, 13 Apr 2023 15:45:22 +0100 | From | Will Deacon <> | Subject | Re: [PATCH v4 2/3] cacheinfo: Add arm64 early level initializer implementation |
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On Thu, Apr 13, 2023 at 11:22:26AM +0100, Sudeep Holla wrote: > Hi Will, > > On Wed, Apr 12, 2023 at 02:57:58PM -0400, Radu Rendec wrote: > > This patch adds an architecture specific early cache level detection > > handler for arm64. This is basically the CLIDR_EL1 based detection that > > was previously done (only) in init_cache_level(). > > > > This is part of a patch series that attempts to further the work in > > commit 5944ce092b97 ("arch_topology: Build cacheinfo from primary CPU"). > > Previously, in the absence of any DT/ACPI cache info, architecture > > specific cache detection and info allocation for secondary CPUs would > > happen in non-preemptible context during early CPU initialization and > > trigger a "BUG: sleeping function called from invalid context" splat on > > an RT kernel. > > > > This patch does not solve the problem completely for RT kernels. It > > relies on the assumption that on most systems, the CPUs are symmetrical > > and therefore have the same number of cache leaves. The cacheinfo memory > > is allocated early (on the primary CPU), relying on the new handler. If > > later (when CLIDR_EL1 based detection runs again on the secondary CPU) > > the initial assumption proves to be wrong and the CPU has in fact more > > leaves, the cacheinfo memory is reallocated, and that still triggers a > > splat on an RT kernel. > > > > In other words, asymmetrical CPU systems *must* still provide cacheinfo > > data in DT/ACPI to avoid the splat on RT kernels (unless secondary CPUs > > happen to have less leaves than the primary CPU). But symmetrical CPU > > systems (the majority) can now get away without the additional DT/ACPI > > data and rely on CLIDR_EL1 based detection. > > > > If you are okay with the change, can I have your Acked-by, so that I can > route this via Greg's tree ?
I really dislike the profileration of __weak functions in this file, rather than the usual approach of having arch-specific static inlines in a header file but it seems that nobody has the appetite to clean that up :(
So I'm fine for Greg to queue this if he wants to, but I'd be a lot more excited if somebody tidied things up a bit first.
Will
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