Messages in this thread Patch in this message | | | From | Konrad Dybcio <> | Date | Wed, 12 Apr 2023 16:53:06 +0200 | Subject | [PATCH 2/3] clk: qcom: dispcc-qcm2290: Remove inexistent DSI1PHY clk |
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There's only one DSI PHY on this SoC. Remove the ghost entry for the clock produced by a secondary one.
Fixes: cc517ea3333f ("clk: qcom: Add display clock controller driver for QCM2290") Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> --- drivers/clk/qcom/dispcc-qcm2290.c | 3 --- 1 file changed, 3 deletions(-)
diff --git a/drivers/clk/qcom/dispcc-qcm2290.c b/drivers/clk/qcom/dispcc-qcm2290.c index 0f516c72e624..ee62aca4e5bb 100644 --- a/drivers/clk/qcom/dispcc-qcm2290.c +++ b/drivers/clk/qcom/dispcc-qcm2290.c @@ -28,7 +28,6 @@ enum { P_DISP_CC_PLL0_OUT_MAIN, P_DSI0_PHY_PLL_OUT_BYTECLK, P_DSI0_PHY_PLL_OUT_DSICLK, - P_DSI1_PHY_PLL_OUT_DSICLK, P_GPLL0_OUT_MAIN, P_SLEEP_CLK, }; @@ -108,13 +107,11 @@ static const struct clk_parent_data disp_cc_parent_data_3[] = { static const struct parent_map disp_cc_parent_map_4[] = { { P_BI_TCXO, 0 }, { P_DSI0_PHY_PLL_OUT_DSICLK, 1 }, - { P_DSI1_PHY_PLL_OUT_DSICLK, 2 }, }; static const struct clk_parent_data disp_cc_parent_data_4[] = { { .fw_name = "bi_tcxo" }, { .fw_name = "dsi0_phy_pll_out_dsiclk" }, - { .fw_name = "dsi1_phy_pll_out_dsiclk" }, }; static const struct parent_map disp_cc_parent_map_5[] = { -- 2.40.0
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