Messages in this thread | | | Date | Wed, 12 Apr 2023 10:04:48 +0100 | From | Will Deacon <> | Subject | Re: [PATCH 3/3] arm64/cpufeature: Use helper macro to specify ID register for capabilites |
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On Mon, Mar 06, 2023 at 10:20:25PM +0000, Mark Brown wrote: > When defining which value to look for in a system register field we > currently manually specify the register, field shift, width and sign and > the value to look for. This opens the potential for error with for example > the wrong field width or sign being specified, an enumeration value for > a different similarly named field or letting something be initialised to 0. > > Since we now generate defines for all the ID registers we now have named > constants for all of these things generated from the system register > description, meaning that we can generate initialisation for all the fields > used in matching from a minimal specification of register, field and match > value. This is both shorter and eliminates or makes build failures several > potential errors. > > No change in the generated binary. > > Signed-off-by: Mark Brown <broonie@kernel.org> > --- > arch/arm64/kernel/cpufeature.c | 245 ++++++++--------------------------------- > 1 file changed, 44 insertions(+), 201 deletions(-)
[...]
> .desc = "WFx with timeout", > .capability = ARM64_HAS_WFXT, > .type = ARM64_CPUCAP_SYSTEM_FEATURE, > - .sys_reg = SYS_ID_AA64ISAR2_EL1, > - .sign = FTR_UNSIGNED, > - .field_pos = ID_AA64ISAR2_EL1_WFxT_SHIFT, > - .field_width = 4, > - .matches = has_cpuid_feature, > - .min_field_value = ID_AA64ISAR2_EL1_WFxT_IMP, > + ARM64_CPUID_FIELDS(ID_AA64ISAR2_EL1, WFxT, IMP)
You drop the '.matches' field here.
Will
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