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SubjectRe: [PATCH v2] phy: cadence: Sierra: Add PCIe + SGMII PHY multilink configuration
On 03-04-23, 10:56, Swapnil Jakhade wrote:
> Add register sequences for PCIe + SGMII PHY multilink configuration.
> This has been validated on TI J7 platforms.

Applied, thanks

--
~Vinod

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