Messages in this thread | | | Date | Sat, 1 Apr 2023 21:43:13 +0800 | Subject | Re: [PATCH v3 4/7] iommu/vt-d: Reserve RID_PASID from global PASID space | From | Baolu Lu <> |
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On 2023/4/1 7:11, Jacob Pan wrote: > On VT-d platforms, RID_PASID is used for DMA request without PASID. We > should not treat RID_PASID special instead let it be allocated from the > global PASID number space. Non-zero value can be used in RID_PASID on > Intel VT-d. > > For ARM, AMD and others that _always_ use 0 as RID_PASID, there is no > impact in that SVA PASID allocation base is 1. > > With this change, devices do both DMA with PASID and SVA will not worry > about conflicts when it comes to allocating PASIDs for in-kernel DMA. > > Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com> > --- > drivers/iommu/intel/iommu.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c > index 9f737ef55463..cbb2670f88ca 100644 > --- a/drivers/iommu/intel/iommu.c > +++ b/drivers/iommu/intel/iommu.c > @@ -3956,6 +3956,10 @@ int __init intel_iommu_init(void) > > intel_iommu_enabled = 1; > > + /* Reserved RID_PASID from the global namespace for legacy DMA */ > + WARN_ON(iommu_alloc_global_pasid(PASID_RID2PASID, PASID_RID2PASID) != > + PASID_RID2PASID);
This looks odd. With the previous patch unchanged, iommu_alloc_global_pasid() will always return IOMMU_PASID_INVALID if CONFIG_IOMMU_SVA is not set.
> + > return 0; > > out_free_dmar:
Best regards, baolu
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