Messages in this thread | | | Date | Wed, 29 Mar 2023 13:50:02 +0530 | Subject | Re: [PATCH v2 4/8] iommu/vt-d: Reserve RID_PASID from global SVA PASID space | From | Vasant Hegde <> |
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On 3/28/2023 10:50 AM, Baolu Lu wrote: > On 3/28/23 7:21 AM, Jacob Pan wrote: >> On VT-d platforms, RID_PASID is used for DMA request without PASID. We >> should not treat RID_PASID special instead let it be allocated from the >> global SVA PASID number space. > > It's same to AMD and ARM SMMUv3, right? They also need an explicit > reservation of PASID 0.
Yes for AMD driver. (Requests from the I/O device without a PASID are treated as if they have PASID of 0).
-Vasant
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