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SubjectRe: [PATCH 1/2] spi: octeontx2: Add support for octeontx2 spi controller
Hi Suneel,

[...]

> +static int tbi_clk_en = 1;

bool?

> +module_param(tbi_clk_en, uint, 0644);
> +MODULE_PARM_DESC(tbi_clk_en,
> + "Use Fixed Time Base 100MHz Reference Clock (0=Disable, 1=Enable [default])");

can we avoid using module parameters? You can have these defined
in device tree and you can also make sysfs interfaces, as well.

> +static int cfg_mode_delay = 30;
> +module_param(cfg_mode_delay, uint, 0644);
> +MODULE_PARM_DESC(cfg_mode_delay,
> + "Delay in micro-seconds for mode change in MPI CFG register (30 [default])");
> +
> +static void octeontx2_spi_wait_ready(struct octeontx2_spi *p)
> +{
> + union mpix_sts mpi_sts;
> + unsigned int loops = 0;
> +
> + mpi_sts.u64 = 0;
> + do {
> + if (loops++)
> + __delay(500);

mmhhh... why have you chosen __delay() ?

> + mpi_sts.u64 = readq(p->register_base + OCTEONTX2_SPI_STS(p));
> + } while (mpi_sts.s.busy);

[...]

> + if (mpi_cfg.u64 != p->last_cfg) {
> + p->last_cfg = mpi_cfg.u64;
> + writeq(mpi_cfg.u64, p->register_base + OCTEONTX2_SPI_CFG(p));
> + mpi_cfg.u64 = readq(p->register_base + OCTEONTX2_SPI_CFG(p));
> + udelay(cfg_mode_delay); /* allow CS change to settle */

before "udelaying" anything that the user gives you, I would
check what cfg_mode_delay is.

Andi

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