Messages in this thread | | | From | "Rafael J. Wysocki" <> | Date | Mon, 27 Mar 2023 18:53:40 +0200 | Subject | Re: [PATCH v3 17/24] thermal: intel: hfi: Enable the Intel Thread Director |
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On Tue, Feb 7, 2023 at 6:02 AM Ricardo Neri <ricardo.neri-calderon@linux.intel.com> wrote: > > Enable Intel Thread Director from the CPU hotplug callback: globally from > CPU0 and then enable the thread-classification hardware in each logical > processor individually. > > Also, initialize the number of classes supported. > > Let the scheduler know that it can start using IPC classes. > > Cc: Ben Segall <bsegall@google.com> > Cc: Daniel Bristot de Oliveira <bristot@redhat.com> > Cc: Dietmar Eggemann <dietmar.eggemann@arm.com> > Cc: Ionela Voinescu <ionela.voinescu@arm.com> > Cc: Joel Fernandes (Google) <joel@joelfernandes.org> > Cc: Len Brown <len.brown@intel.com> > Cc: Lukasz Luba <lukasz.luba@arm.com> > Cc: Mel Gorman <mgorman@suse.de> > Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com> > Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> > Cc: Steven Rostedt <rostedt@goodmis.org> > Cc: Tim C. Chen <tim.c.chen@intel.com> > Cc: Valentin Schneider <vschneid@redhat.com> > Cc: x86@kernel.org > Cc: linux-pm@vger.kernel.org > Cc: linux-kernel@vger.kernel.org > Signed-off-by: Ricardo Neri <ricardo.neri-calderon@linux.intel.com>
For the changes in intel_hfi.c
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
> --- > Changes since v2: > * Use the new sched_enable_ipc_classes() interface to enable the use of > IPC classes in the scheduler. > > Changes since v1: > * None > --- > arch/x86/include/asm/msr-index.h | 2 ++ > drivers/thermal/intel/intel_hfi.c | 40 +++++++++++++++++++++++++++++-- > 2 files changed, 40 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h > index ad35355ee43e..0ea25cc9c621 100644 > --- a/arch/x86/include/asm/msr-index.h > +++ b/arch/x86/include/asm/msr-index.h > @@ -1106,6 +1106,8 @@ > /* Hardware Feedback Interface */ > #define MSR_IA32_HW_FEEDBACK_PTR 0x17d0 > #define MSR_IA32_HW_FEEDBACK_CONFIG 0x17d1 > +#define MSR_IA32_HW_FEEDBACK_THREAD_CONFIG 0x17d4 > +#define MSR_IA32_HW_FEEDBACK_CHAR 0x17d2 > > /* x2APIC locked status */ > #define MSR_IA32_XAPIC_DISABLE_STATUS 0xBD > diff --git a/drivers/thermal/intel/intel_hfi.c b/drivers/thermal/intel/intel_hfi.c > index 7ea6acce7107..35d947f47550 100644 > --- a/drivers/thermal/intel/intel_hfi.c > +++ b/drivers/thermal/intel/intel_hfi.c > @@ -48,6 +48,8 @@ > /* Hardware Feedback Interface MSR configuration bits */ > #define HW_FEEDBACK_PTR_VALID_BIT BIT(0) > #define HW_FEEDBACK_CONFIG_HFI_ENABLE_BIT BIT(0) > +#define HW_FEEDBACK_CONFIG_ITD_ENABLE_BIT BIT(1) > +#define HW_FEEDBACK_THREAD_CONFIG_ENABLE_BIT BIT(0) > > /* CPUID detection and enumeration definitions for HFI */ > > @@ -72,6 +74,15 @@ union cpuid6_edx { > u32 full; > }; > > +union cpuid6_ecx { > + struct { > + u32 dont_care0:8; > + u32 nr_classes:8; > + u32 dont_care1:16; > + } split; > + u32 full; > +}; > + > #ifdef CONFIG_IPC_CLASSES > union hfi_thread_feedback_char_msr { > struct { > @@ -506,6 +517,11 @@ void intel_hfi_online(unsigned int cpu) > > init_hfi_cpu_index(info); > > + if (cpu_feature_enabled(X86_FEATURE_ITD)) { > + msr_val = HW_FEEDBACK_THREAD_CONFIG_ENABLE_BIT; > + wrmsrl(MSR_IA32_HW_FEEDBACK_THREAD_CONFIG, msr_val); > + } > + > /* > * Now check if the HFI instance of the package/die of @cpu has been > * initialized (by checking its header). In such case, all we have to > @@ -561,8 +577,22 @@ void intel_hfi_online(unsigned int cpu) > */ > rdmsrl(MSR_IA32_HW_FEEDBACK_CONFIG, msr_val); > msr_val |= HW_FEEDBACK_CONFIG_HFI_ENABLE_BIT; > + > + if (cpu_feature_enabled(X86_FEATURE_ITD)) > + msr_val |= HW_FEEDBACK_CONFIG_ITD_ENABLE_BIT; > + > wrmsrl(MSR_IA32_HW_FEEDBACK_CONFIG, msr_val); > > + /* > + * We have all we need to support IPC classes. Task classification is > + * now working. > + * > + * All class scores are zero until after the first HFI update. That is > + * OK. The scheduler queries these scores at every load balance. > + */ > + if (cpu_feature_enabled(X86_FEATURE_ITD)) > + sched_enable_ipc_classes(); > + > unlock: > mutex_unlock(&hfi_instance_lock); > return; > @@ -640,8 +670,14 @@ static __init int hfi_parse_features(void) > */ > hfi_features.class_stride = nr_capabilities; > > - /* For now, use only one class of the HFI table */ > - hfi_features.nr_classes = 1; > + if (cpu_feature_enabled(X86_FEATURE_ITD)) { > + union cpuid6_ecx ecx; > + > + ecx.full = cpuid_ecx(CPUID_HFI_LEAF); > + hfi_features.nr_classes = ecx.split.nr_classes; > + } else { > + hfi_features.nr_classes = 1; > + } > > /* > * The header contains change indications for each supported feature. > -- > 2.25.1 >
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