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    Subject[PATCH v2 4/5] cxl/pci: Forward RCH downstream port-detected errors to the CXL.mem dev handler
    Date
    From: Robert Richter <rrichter@amd.com>

    In RCD mode a CXL device (RCD) is exposed as an RCiEP, but CXL
    downstream and upstream ports are not enumerated and not visible in
    the PCIe hierarchy. Protocol and link errors are sent to an RCEC.

    Now, RCH downstream port-detected errors are signaled as internal AER
    errors (UIE/CIE) with the RCEC's source ID. A CXL handler must then
    inspect the error status in various CXL registers residing in the
    dport's component register space (CXL RAS cap) or the dport's RCRB
    (AER ext cap). [1]

    This patch connects errors showing up in the RCEC's error handler with
    the CXL subsystem. Implement this by forwarding the error to all CXL
    devices below the RCEC. Since the entire CXL device is controlled only
    using PCIe Configuration Space of device 0, Function 0, only pass it
    there [2]. These devices have the Memory Device class code set
    (PCI_CLASS_MEMORY_CXL, 502h) and the existing cxl_pci driver can
    implement the handler. The CXL device driver is then responsible to
    enable error reporting in the RCEC's AER cap (esp. CIE and UIE) and to
    inspect the dport's CXL registers in addition (CXL RAS cap and AER ext
    cap).

    The reason for choosing this implementation is that a CXL RCEC device
    is bound to the AER port driver, but the driver does not allow it to
    register a custom specific handler to support CXL. Connecting the RCEC
    hard-wired with a CXL handler does not work, as the CXL subsystem
    might not be present all the time. The alternative to add an
    implementation to the portdrv to allow the registration of a custom
    RCEC error handler isn't worth doing it as CXL would be its only user.
    Instead, just check for an CXL RCEC and pass it down to the connected
    CXL device's error handler.

    [1] CXL 3.0 spec, 12.2.1.1 RCH Downstream Port-detected Errors
    [2] CXL 3.0 spec, 8.1.3 PCIe DVSEC for CXL Devices

    Co-developed-by: Terry Bowman <terry.bowman@amd.com>
    Signed-off-by: Terry Bowman <terry.bowman@amd.com>
    Signed-off-by: Robert Richter <rrichter@amd.com>
    Cc: "Oliver O'Halloran" <oohall@gmail.com>
    Cc: Bjorn Helgaas <bhelgaas@google.com>
    Cc: linuxppc-dev@lists.ozlabs.org
    Cc: linux-pci@vger.kernel.org
    ---
    drivers/pci/pcie/aer.c | 45 ++++++++++++++++++++++++++++++++++++++++++
    1 file changed, 45 insertions(+)

    diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
    index 7f0f52d094a4..d250a4caa85a 100644
    --- a/drivers/pci/pcie/aer.c
    +++ b/drivers/pci/pcie/aer.c
    @@ -943,6 +943,49 @@ static bool find_source_device(struct pci_dev *parent,
    return true;
    }

    +#if IS_ENABLED(CONFIG_CXL_PCI)
    +
    +static void handle_error_source(struct pci_dev *dev, struct aer_err_info *info);
    +
    +static int handle_cxl_error_iter(struct pci_dev *dev, void *data)
    +{
    + struct aer_err_info *e_info = (struct aer_err_info *)data;
    +
    + if (dev->devfn != PCI_DEVFN(0, 0))
    + return 0;
    +
    + /* Right now there is only a CXL.mem driver */
    + if ((dev->class >> 8) != PCI_CLASS_MEMORY_CXL)
    + return 0;
    +
    + /* pci_dev_put() in handle_error_source() */
    + dev = pci_dev_get(dev);
    + if (dev)
    + handle_error_source(dev, e_info);
    +
    + return 0;
    +}
    +
    +static bool is_internal_error(struct aer_err_info *info)
    +{
    + if (info->severity == AER_CORRECTABLE)
    + return info->status & PCI_ERR_COR_INTERNAL;
    +
    + return info->status & PCI_ERR_UNC_INTN;
    +}
    +
    +static void handle_cxl_error(struct pci_dev *dev, struct aer_err_info *info)
    +{
    + if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_EC &&
    + is_internal_error(info))
    + pcie_walk_rcec(dev, handle_cxl_error_iter, info);
    +}
    +
    +#else
    +static inline void handle_cxl_error(struct pci_dev *dev,
    + struct aer_err_info *info) { }
    +#endif
    +
    /**
    * handle_error_source - handle logging error into an event log
    * @dev: pointer to pci_dev data structure of error source device
    @@ -954,6 +997,8 @@ static void handle_error_source(struct pci_dev *dev, struct aer_err_info *info)
    {
    int aer = dev->aer_cap;

    + handle_cxl_error(dev, info);
    +
    if (info->severity == AER_CORRECTABLE) {
    /*
    * Correctable error does not need software intervention.
    --
    2.34.1
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