lkml.org 
[lkml]   [2023]   [Mar]   [20]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH v6 18/21] dt-bindings: riscv: Add SiFive S7 compatible
    Date
    Add a new compatible string in cpu.yaml for SiFive S7 CPU
    core which is used on SiFive U74-MC core complex etc.

    Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
    Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
    Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
    ---
    Documentation/devicetree/bindings/riscv/cpus.yaml | 1 +
    1 file changed, 1 insertion(+)

    diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
    index 001931d526ec..14b5b7ea0ce0 100644
    --- a/Documentation/devicetree/bindings/riscv/cpus.yaml
    +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
    @@ -35,6 +35,7 @@ properties:
    - sifive,e7
    - sifive,e71
    - sifive,rocket0
    + - sifive,s7
    - sifive,u5
    - sifive,u54
    - sifive,u7
    --
    2.38.1
    \
     
     \ /
      Last update: 2023-03-27 01:08    [W:4.286 / U:0.008 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site