Messages in this thread | | | Date | Mon, 20 Mar 2023 14:38:59 -0500 | Subject | Re: [PATCH] ASoC: cs35l41: Add 12288000 clk freq to cs35l41_fs_mon clk config | From | "Rhodes, David" <> |
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On 3/18/23 9:14 AM, Jianhua Lu wrote: > There are 8 cs35l41 speaker amplifier connected to TDM > in my Xiaomi Mi Pad 5 Pro tablet. In this case, it's necessary > to set 12288000 (48000 * 32 * 8) clk freq for it. > > rate=48000, slot_width=32, slots=8. > > Signed-off-by: Jianhua Lu <lujianhua000@gmail.com> > --- > sound/soc/codecs/cs35l41.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/sound/soc/codecs/cs35l41.c b/sound/soc/codecs/cs35l41.c > index 9ec01a5f09ca..6ac501f008ec 100644 > --- a/sound/soc/codecs/cs35l41.c > +++ b/sound/soc/codecs/cs35l41.c > @@ -150,6 +150,7 @@ static const struct cs35l41_fs_mon_config cs35l41_fs_mon[] = { > { 5644800, 16, 24 }, > { 6000000, 16, 24 }, > { 6144000, 16, 24 }, > + { 12288000, 0, 0 }, > }; > > static int cs35l41_get_fs_mon_config_index(int freq)
This is a valid clocking configuration. 12.288 MHz is already available in cs35l41_pll_sysclk[] as well. Values for fs1 and fs2 are not required because cs35l41_dai_set_sysclk() will use hardcoded values for freq > 6.144 MHz.
Reviewed-by: David Rhodes <David.Rhodes@cirrus.com>
Thanks, David
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