Messages in this thread | | | Date | Mon, 20 Mar 2023 09:44:04 -0700 | Subject | Re: [PATCH] x86/cacheinfo: Define per-CPU num_cache_leaves | From | Dave Hansen <> |
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On 3/14/23 16:16, Ricardo Neri wrote: > -static unsigned short num_cache_leaves; > +static DEFINE_PER_CPU(unsigned short, num_cache_leaves); > + > +static inline unsigned short get_num_cache_leaves(unsigned int cpu) > +{ > + return per_cpu(num_cache_leaves, cpu); > +}
I know it's in generic code, but we do already have this:
static DEFINE_PER_CPU(struct cpu_cacheinfo, ci_cpu_cacheinfo);
which has a num_leaves in it:
struct cpu_cacheinfo { struct cacheinfo *info_list; unsigned int num_levels; unsigned int num_leaves; bool cpu_map_populated; };
That's currently _populated_ from the arch code that you are modifying. Do we really need this data stored identically in two different per-cpu locations?
I'd also love to hear some more background on "Intel Meteor Lake" and _why_ it has an asymmetric cache topology.
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