Messages in this thread | | | From | Frank Li <> | Subject | RE: [PATCH 1/1] PCI: layerscape: Add the workaround for A-010305 | Date | Tue, 14 Mar 2023 19:57:43 +0000 |
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> > > -----Original Message----- > > From: Frank Li > > Subject: RE: [PATCH 1/1] PCI: layerscape: Add the workaround for A-010305 > > > > > Subject: [PATCH 1/1] PCI: layerscape: Add the workaround for A-010305 > > > > > > From: Xiaowei Bao <xiaowei.bao@nxp.com> > > > > > > When a link down or hot reset event occurs, the PCI Express EP > > > controller's Link Capabilities Register should retain the values of > > > the Maximum Link Width and Supported Link Speed configured by RCW. > > > > > > Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> > > > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> > > > Signed-off-by: Frank Li <Frank.Li@nxp.com> > > > --- > > > > Ping > > Friendly ping.
Ping. No feedback for over 1 month!
> > > > > > > > static struct platform_driver ls_pcie_ep_driver = { > > > -- > > > 2.34.1
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