Messages in this thread | | | From | Guo Ren <> | Date | Thu, 9 Feb 2023 17:11:24 +0800 | Subject | Re: [PATCH -next V7 0/7] riscv: Optimize function trace |
| |
On Thu, Feb 9, 2023 at 5:00 PM David Laight <David.Laight@aculab.com> wrote: > > From: Guo Ren > > Sent: 09 February 2023 01:51 > ... > > Yours cost one more instruction, right? > > addr-12 auipc > > addr-8 jalr > > addr-4 // Literal (32-bits) > > addr+0 nop or jmp addr-n // one more? > > addr+4 function_code > > Yes, it is 4 bytes larger but there is one less > instruction executed (only one nop) when ftrace is disabled. > That probably matters more than anything in the ftrace > 'prologue' code. I've got your point, thx. I would consider your advice and make the tradeoff.
> > I also suspect that you can use a 32bit integer as > a table index in 64bit mode to save a word there. Yes, good idea. I've asked Mark Rutland. Let's wait for his feedback. It also helps arm64.
> > David > > - > Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK > Registration No: 1397386 (Wales)
-- Best Regards Guo Ren
| |