Messages in this thread | | | Date | Tue, 7 Feb 2023 13:07:55 -0600 | Subject | [PATCH v1 3/3] x86/MCE/AMD: Handle reassigned bit definitions for CS SMCA | From | Avadhut Naik <> |
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Hi,
On 1/17/2023 03:23, Ingo Molnar wrote: > > * Avadhut Naik <avadnaik@amd.com> wrote: > >> @@ -178,6 +178,8 @@ static const struct smca_hwid smca_hwid_mcatypes[] = { >> { SMCA_CS, HWID_MCATYPE(0x2E, 0x0) }, >> { SMCA_PIE, HWID_MCATYPE(0x2E, 0x1) }, >> { SMCA_CS_V2, HWID_MCATYPE(0x2E, 0x2) }, >> + /* Software defined SMCA bank type to handle erratum 1384*/ >> + { SMCA_CS_V2_QUIRK, HWID_MCATYPE(0x0, 0x1) }, >> >> /* Unified Memory Controller MCA type */ >> { SMCA_UMC, HWID_MCATYPE(0x96, 0x0) }, >> @@ -259,6 +261,17 @@ static inline void fixup_hwid(unsigned int *hwid_mcatype) >> >> if (c->x86 == 0x19) { >> switch (c->x86_model) { >> + /* >> + * Per Genoa's revision guide, erratum 1384, some SMCA Extended >> + * Error Codes and SMCA Control bits are incorrect for SMCA CS >> + * bank type. >> + */ >> + case 0x10 ... 0x1F: >> + case 0x60 ... 0x7B: >> + case 0xA0 ... 0xAF: >> + if (*hwid_mcatype == HWID_MCATYPE(0x2E, 0x2)) >> + *hwid_mcatype = HWID_MCATYPE(0x0, 0x1); > > Why are we open-coding these types? > > Why not use smca_hwid_mcatypes[SMCA_CS_V2], etc.?
If I understood correctly (And please rectify me if I didn't), did you mean using something like the below snippet instead of what I have used?
if (*hwid_mcatype == smca_hwid_mcatypes[SMCA_CS_V2].hwid_mcatype) *hwid_mcatype = smca_hwid_mcatypes[SMCA_CS_V2_QUIRK].hwid_mcatype;
If yes, then SMCA_CS_V2, SMCA_CS_V2_QUIRK etc. originate from the enum smca_bank_types in arch/x86/include/asm/mce.h. As the enum stands now, it cannot be used for indexing into the smca_hwid_mcatypes array since it might result in incorrect indexing.
Please advise.
Thanks, Avadhut Naik > >> + if (*hwid_mcatype == HWID_MCATYPE(0x2E, 0x2)) >> + *hwid_mcatype = HWID_MCATYPE(0x0, 0x1); > > Ditto. > > Thanks, > > Ingo
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