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    Subject[PATCH V7 3/7] dt-bindings: pinctrl: qcom: Add support for IPQ9574
    Date
    Add new binding document for pinctrl on IPQ9574

    Co-developed-by: Anusha Rao <quic_anusha@quicinc.com>
    Signed-off-by: Anusha Rao <quic_anusha@quicinc.com>
    Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
    ---
    Changes in V7:
    - Updated the function enum names for mac, pta and pwm pins as
    they have been grouped in the pinctrl driver
    - Dropped the pin enum names as they are not used in the driver
    - Dropped the Reviewed-by tag due to the above changes

    .../bindings/pinctrl/qcom,ipq9574-tlmm.yaml | 130 ++++++++++++++++++
    1 file changed, 130 insertions(+)
    create mode 100644 Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml

    diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml
    new file mode 100644
    index 000000000000..f32239d08c32
    --- /dev/null
    +++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq9574-tlmm.yaml
    @@ -0,0 +1,130 @@
    +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
    +%YAML 1.2
    +---
    +$id: http://devicetree.org/schemas/pinctrl/qcom,ipq9574-tlmm.yaml#
    +$schema: http://devicetree.org/meta-schemas/core.yaml#
    +
    +title: Qualcomm Technologies, Inc. IPQ9574 TLMM block
    +
    +maintainers:
    + - Bjorn Andersson <andersson@kernel.org>
    + - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
    +
    +description:
    + Top Level Mode Multiplexer pin controller in Qualcomm IPQ9574 SoC.
    +
    +properties:
    + compatible:
    + const: qcom,ipq9574-tlmm
    +
    + reg:
    + maxItems: 1
    +
    + interrupts:
    + maxItems: 1
    +
    + interrupt-controller: true
    + "#interrupt-cells": true
    + gpio-controller: true
    + "#gpio-cells": true
    + gpio-ranges: true
    + wakeup-parent: true
    +
    + gpio-reserved-ranges:
    + minItems: 1
    + maxItems: 33
    +
    + gpio-line-names:
    + maxItems: 65
    +
    +patternProperties:
    + "-state$":
    + oneOf:
    + - $ref: "#/$defs/qcom-ipq9574-tlmm-state"
    + - patternProperties:
    + "-pins$":
    + $ref: "#/$defs/qcom-ipq9574-tlmm-state"
    + additionalProperties: false
    +
    +$defs:
    + qcom-ipq9574-tlmm-state:
    + type: object
    + description:
    + Pinctrl node's client devices use subnodes for desired pin configuration.
    + Client device subnodes use below standard properties.
    + $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
    +
    + properties:
    + pins:
    + description:
    + List of gpio pins affected by the properties specified in this
    + subnode.
    + items:
    + pattern: "^gpio([0-9]|[1-5][0-9]|6[0-4])$"
    + minItems: 1
    + maxItems: 8
    +
    + function:
    + description:
    + Specify the alternative function to be configured for the specified
    + pins.
    +
    + enum: [ atest_char, atest_char0, atest_char1, atest_char2, atest_char3,
    + audio_pdm0, audio_pdm1, audio_pri, audio_sec, blsp0_spi, blsp0_uart,
    + blsp1_i2c, blsp1_spi, blsp1_uart, blsp2_i2c, blsp2_spi,
    + blsp2_uart, blsp3_i2c, blsp3_spi, blsp3_uart, blsp4_i2c,
    + blsp4_spi, blsp4_uart, blsp5_i2c, blsp5_uart, cri_trng0,
    + cri_trng1, cri_trng3, cxc0, cxc1, dbg_out, dwc_ddrphy,
    + gcc_plltest, gcc_tlmm, mac, mdc, mdio, pcie0_clk, pcie0_wake,
    + pcie1_clk, pcie1_wake, pcie2_clk, pcie2_wake, pcie3_clk, pcie3_wake,
    + prng_rosc0, prng_rosc1, prng_rosc2, prng_rosc3, pta, pwm,
    + qdss_cti_trig_in_a0, qdss_cti_trig_in_a1, qdss_cti_trig_in_b0,
    + qdss_cti_trig_in_b1, qdss_cti_trig_out_a0, qdss_cti_trig_out_a1,
    + qdss_cti_trig_out_b0, qdss_cti_trig_out_b1, qdss_traceclk_a,
    + qdss_traceclk_b, qdss_tracectl_a, qdss_tracectl_b, qdss_tracedata_a,
    + qdss_tracedata_b, qdss_tracedata_b, qspi_clk, qspi_cs, qspi_data,
    + rx0, rx1, sdc_clk, sdc_cmd, sdc_data, sdc_rclk, tsens_max,
    + wci20, wci21, wsa_swrm ]
    +
    + bias-pull-down: true
    + bias-pull-up: true
    + bias-disable: true
    + drive-strength: true
    + input-enable: true
    + output-high: true
    + output-low: true
    +
    + required:
    + - pins
    +
    + additionalProperties: false
    +
    +allOf:
    + - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
    +
    +required:
    + - compatible
    + - reg
    +
    +additionalProperties: false
    +
    +examples:
    + - |
    + #include <dt-bindings/interrupt-controller/arm-gic.h>
    + tlmm: pinctrl@1000000 {
    + compatible = "qcom,ipq9574-tlmm";
    + reg = <0x01000000 0x300000>;
    + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
    + gpio-controller;
    + #gpio-cells = <2>;
    + interrupt-controller;
    + #interrupt-cells = <2>;
    + gpio-ranges = <&tlmm 0 0 65>;
    +
    + uart2-state {
    + pins = "gpio34", "gpio35";
    + function = "blsp2_uart";
    + drive-strength = <8>;
    + bias-pull-down;
    + };
    + };
    --
    2.17.1
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