Messages in this thread | | | Date | Sun, 05 Feb 2023 11:04:14 +0000 | From | Marc Zyngier <> | Subject | Re: [PATCH v16 0/9] RISC-V IPI Improvements |
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On Tue, 03 Jan 2023 14:12:12 +0000, Anup Patel <apatel@ventanamicro.com> wrote: > > This series aims to improve IPI support in Linux RISC-V in following ways: > 1) Treat IPIs as normal per-CPU interrupts instead of having custom RISC-V > specific hooks. This also makes Linux RISC-V IPI support aligned with > other architectures. > 2) Remote TLB flushes and icache flushes should prefer local IPIs instead > of SBI calls whenever we have specialized hardware (such as RISC-V AIA > IMSIC and RISC-V SWI) which allows S-mode software to directly inject > IPIs without any assistance from M-mode runtime firmware.
[...]
I'm queuing patches 3 and 9 via the irqchip tree as they are standalone.
For the rest, I need an Ack from the riscv maintainers as they change a large amount of arch-specific code, and the couple of irqchip patches depend on these changes.
Palmer, Paul?
Thanks,
M.
-- Without deviation from the norm, progress is not possible.
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