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    Subject[PATCH 16/16] ARM: dts: qcom: ipq8064: Fix the PCI I/O port range
    Date
    For 64KiB of the I/O region, the I/O ports of the legacy PCI devices are
    located in the range of 0x0 to 0x10000. Hence, fix the bogus PCI addresses
    (0x0fe00000, 0x31e00000, 0x35e00000) specified in the ranges property for
    I/O region.

    While at it, let's use the missing 0x prefix for the addresses.

    Fixes: 93241840b664 ("ARM: dts: qcom: Add pcie nodes for ipq8064")
    Reported-by: Arnd Bergmann <arnd@arndb.de>
    Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/
    Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
    ---
    arch/arm/boot/dts/qcom-ipq8064.dtsi | 12 ++++++------
    1 file changed, 6 insertions(+), 6 deletions(-)

    diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
    index 52d77e105957..59fc18c448c4 100644
    --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
    +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
    @@ -1081,8 +1081,8 @@ pcie0: pci@1b500000 {
    #address-cells = <3>;
    #size-cells = <2>;

    - ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00010000 /* downstream I/O */
    - 0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */
    + ranges = <0x81000000 0x0 0x00000000 0x0fe00000 0x0 0x00010000 /* I/O */
    + 0x82000000 0x0 0x08000000 0x08000000 0x0 0x07e00000>; /* MEM */

    interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
    interrupt-names = "msi";
    @@ -1132,8 +1132,8 @@ pcie1: pci@1b700000 {
    #address-cells = <3>;
    #size-cells = <2>;

    - ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00010000 /* downstream I/O */
    - 0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
    + ranges = <0x81000000 0x0 0x00000000 0x31e00000 0x0 0x00010000 /* I/O */
    + 0x82000000 0x0 0x2e000000 0x2e000000 0x0 0x03e00000>; /* MEM */

    interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
    interrupt-names = "msi";
    @@ -1183,8 +1183,8 @@ pcie2: pci@1b900000 {
    #address-cells = <3>;
    #size-cells = <2>;

    - ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00010000 /* downstream I/O */
    - 0x82000000 0 0x32000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */
    + ranges = <0x81000000 0x0 0x00000000 0x35e00000 0x0 0x00010000 /* I/O */
    + 0x82000000 0x0 0x32000000 0x32000000 0x0 0x03e00000>; /* MEM */

    interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
    interrupt-names = "msi";
    --
    2.25.1
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