Messages in this thread | | | Date | Fri, 24 Feb 2023 13:09:21 -0800 | Subject | Re: [RFC PATCH 2/2] drm/msm/dsi: use new dpu_dsc_populate_dsc_config() | From | Abhinav Kumar <> |
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On 2/24/2023 1:04 PM, Dmitry Baryshkov wrote: > On 24/02/2023 21:40, Kuogee Hsieh wrote: >> use new introduced dpu_dsc_populate_dsc_config() to calculate >> and populate drm_dsc_info instead of hard code value. > > DPU is an optional component, so DSI driver should not depend on the DPU > driver. >
Today, the implicit dependency is already there. Without the DPU DSC blocks, the DSI cannot operate in compressed mode.
But, from a SW standpoint I agree we can separate this.
We can move this one level up to the disp/ or msm/ folder
What do you think about that?
>> >> Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com> >> --- >> drivers/gpu/drm/msm/dsi/dsi_host.c | 78 >> ++++++-------------------------------- >> 1 file changed, 12 insertions(+), 66 deletions(-) >> >> diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c >> b/drivers/gpu/drm/msm/dsi/dsi_host.c >> index 31ad193..5f3f84f 100644 >> --- a/drivers/gpu/drm/msm/dsi/dsi_host.c >> +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c >> @@ -1,6 +1,7 @@ >> // SPDX-License-Identifier: GPL-2.0-only >> /* >> * Copyright (c) 2015, The Linux Foundation. All rights reserved. >> + * Copyright (c) 2023. Qualcomm Innovation Center, Inc. All rights >> reserved >> */ >> #include <linux/clk.h> >> @@ -21,7 +22,6 @@ >> #include <video/mipi_display.h> >> -#include <drm/display/drm_dsc_helper.h> >> #include <drm/drm_of.h> >> #include "dsi.h" >> @@ -31,6 +31,7 @@ >> #include "msm_kms.h" >> #include "msm_gem.h" >> #include "phy/dsi_phy.h" >> +#include "dpu_dsc_helper.h" >> #define DSI_RESET_TOGGLE_DELAY_MS 20 >> @@ -1819,29 +1820,8 @@ static int dsi_host_parse_lane_data(struct >> msm_dsi_host *msm_host, >> return -EINVAL; >> } >> -static u32 dsi_dsc_rc_buf_thresh[DSC_NUM_BUF_RANGES - 1] = { >> - 0x0e, 0x1c, 0x2a, 0x38, 0x46, 0x54, 0x62, >> - 0x69, 0x70, 0x77, 0x79, 0x7b, 0x7d, 0x7e >> -}; >> - >> -/* only 8bpc, 8bpp added */ >> -static char min_qp[DSC_NUM_BUF_RANGES] = { >> - 0, 0, 1, 1, 3, 3, 3, 3, 3, 3, 5, 5, 5, 7, 13 >> -}; >> - >> -static char max_qp[DSC_NUM_BUF_RANGES] = { >> - 4, 4, 5, 6, 7, 7, 7, 8, 9, 10, 11, 12, 13, 13, 15 >> -}; >> - >> -static char bpg_offset[DSC_NUM_BUF_RANGES] = { >> - 2, 0, 0, -2, -4, -6, -8, -8, -8, -10, -10, -12, -12, -12, -12 >> -}; >> - >> static int dsi_populate_dsc_params(struct msm_dsi_host *msm_host, >> struct drm_dsc_config *dsc) >> { >> - int i; >> - u16 bpp = dsc->bits_per_pixel >> 4; >> - >> if (dsc->bits_per_pixel & 0xf) { >> DRM_DEV_ERROR(&msm_host->pdev->dev, "DSI does not support >> fractional bits_per_pixel\n"); >> return -EINVAL; >> @@ -1852,50 +1832,16 @@ static int dsi_populate_dsc_params(struct >> msm_dsi_host *msm_host, struct drm_dsc >> return -EOPNOTSUPP; >> } >> - dsc->rc_model_size = 8192; >> - dsc->first_line_bpg_offset = 12; >> - dsc->rc_edge_factor = 6; >> - dsc->rc_tgt_offset_high = 3; >> - dsc->rc_tgt_offset_low = 3; >> - dsc->simple_422 = 0; >> - dsc->convert_rgb = 1; >> - dsc->vbr_enable = 0; >> - >> - /* handle only bpp = bpc = 8 */ >> - for (i = 0; i < DSC_NUM_BUF_RANGES - 1 ; i++) >> - dsc->rc_buf_thresh[i] = dsi_dsc_rc_buf_thresh[i]; >> - >> - for (i = 0; i < DSC_NUM_BUF_RANGES; i++) { >> - dsc->rc_range_params[i].range_min_qp = min_qp[i]; >> - dsc->rc_range_params[i].range_max_qp = max_qp[i]; >> - /* >> - * Range BPG Offset contains two's-complement signed values >> that fill >> - * 8 bits, yet the registers and DCS PPS field are only 6 >> bits wide. >> - */ >> - dsc->rc_range_params[i].range_bpg_offset = bpg_offset[i] & >> DSC_RANGE_BPG_OFFSET_MASK; >> - } >> - >> - dsc->initial_offset = 6144; /* Not bpp 12 */ >> - if (bpp != 8) >> - dsc->initial_offset = 2048; /* bpp = 12 */ >> - >> - if (dsc->bits_per_component <= 10) >> - dsc->mux_word_size = DSC_MUX_WORD_SIZE_8_10_BPC; >> - else >> - dsc->mux_word_size = DSC_MUX_WORD_SIZE_12_BPC; >> - >> - dsc->initial_xmit_delay = 512; >> - dsc->initial_scale_value = 32; >> - dsc->first_line_bpg_offset = 12; >> - dsc->line_buf_depth = dsc->bits_per_component + 1; >> - >> - /* bpc 8 */ >> - dsc->flatness_min_qp = 3; >> - dsc->flatness_max_qp = 12; >> - dsc->rc_quant_incr_limit0 = 11; >> - dsc->rc_quant_incr_limit1 = 11; >> - >> - return drm_dsc_compute_rc_parameters(dsc); >> + /* >> + * NOTE: >> + * dsc->dsc_version_major, dsc->dsc_version_minor >> + * dsc->bits_per_pixel, >> + * dsc->bits_per_component, >> + * dsc->native_422, dsc->native_420 >> + * >> + * above parameters must be populated > > Comments > In Yoda style > written should be not. > >> + */ >> + return dpu_dsc_populate_dsc_config(dsc, 0); >> } >> static int dsi_host_parse_dt(struct msm_dsi_host *msm_host) >
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