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SubjectRe: [PATCH net-next] net: pcs: tse: port to pcs-lynx
Hi Vlad, Andrew,

On Fri, 10 Feb 2023 21:02:39 +0100
Andrew Lunn <andrew@lunn.ch> wrote:

> On Fri, Feb 10, 2023 at 09:31:59PM +0200, Vladimir Oltean wrote:
> > On Fri, Feb 10, 2023 at 08:09:49PM +0100, Maxime Chevallier wrote:
> > > When submitting the initial driver for the Altera TSE PCS,
> > > Russell King noted that the register layout for the TSE PCS is
> > > very similar to the Lynx PCS. The main difference being that TSE
> > > PCS's register space is memory-mapped, whereas Lynx's is exposed
> > > over MDIO.
> > >
> > > Convert the TSE PCS to reuse the whole logic from Lynx, by
> > > allowing the creation of a dummy MDIO bus, and a dummy MDIO
> > > device located at address 0 on that bus. The MAC driver that uses
> > > this PCS must provide callbacks to read/write the MMIO.
> > >
> > > Also convert the Altera TSE MAC driver to this new way of using
> > > the TSE PCS.
> > >
> > > Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
> > > ---
> > > drivers/net/ethernet/altera/altera_tse.h | 2 +-
> > > drivers/net/ethernet/altera/altera_tse_main.c | 50 ++++-
> > > drivers/net/pcs/Kconfig | 4 +
> > > drivers/net/pcs/pcs-altera-tse.c | 194
> > > +++++++----------- include/linux/pcs-altera-tse.h
> > > | 22 +- 5 files changed, 142 insertions(+), 130 deletions(-)
> >
> > The glue layer is larger than the duplicated PCS code? :(
>
> I was wondering if the glue could actually be made generic. The kernel
> has a number of reasonably generic MMIO device drivers, which are just
> given an address range and assume a logical mapping.
>
> Could this be made into a generic MDIO MMIO bus driver, which just
> gets configured with a base address, and maybe a stride between
> registers?

That would be ideal, I'll spin a new series prorotyping this, indeed
that can be interesting for other devices.

Thanks for the review,

Maxime

> Andrew

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