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Subject[PATCH 2/7] MIPS: Always select ARCH_HAS_SYNC_DMA_FOR_CPU for noncoherent platforms
Date
As now we are telling the necessity of post DMA flush per CPU type,
there is no need to select ARCH_HAS_SYNC_DMA_FOR_CPU on per platform
bias, just select it unconditionally and we can sort it at runtime.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
---
arch/mips/Kconfig | 9 +--------
1 file changed, 1 insertion(+), 8 deletions(-)

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index c6f3ad51f741..8da52863da4e 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -115,7 +115,6 @@ config MACH_INGENIC
select SYS_SUPPORTS_LITTLE_ENDIAN
select SYS_SUPPORTS_ZBOOT
select DMA_NONCOHERENT
- select ARCH_HAS_SYNC_DMA_FOR_CPU
select IRQ_MIPS_CPU
select PINCTRL
select GPIOLIB
@@ -1089,6 +1088,7 @@ config DMA_NONCOHERENT
#
select ARCH_HAS_DMA_WRITE_COMBINE
select ARCH_HAS_DMA_PREP_COHERENT
+ select ARCH_HAS_SYNC_DMA_FOR_CPU
select ARCH_HAS_SYNC_DMA_FOR_DEVICE
select ARCH_HAS_DMA_SET_UNCACHED
select ARCH_HAS_SETUP_DMA_OPS
@@ -1853,11 +1853,9 @@ config SYS_HAS_CPU_MIPS32_R3_5

config SYS_HAS_CPU_MIPS32_R5
bool
- select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT

config SYS_HAS_CPU_MIPS32_R6
bool
- select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT

config SYS_HAS_CPU_MIPS64_R1
bool
@@ -1867,15 +1865,12 @@ config SYS_HAS_CPU_MIPS64_R2

config SYS_HAS_CPU_MIPS64_R5
bool
- select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT

config SYS_HAS_CPU_MIPS64_R6
bool
- select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT

config SYS_HAS_CPU_P5600
bool
- select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT

config SYS_HAS_CPU_R3000
bool
@@ -1900,7 +1895,6 @@ config SYS_HAS_CPU_NEVADA

config SYS_HAS_CPU_R10000
bool
- select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT

config SYS_HAS_CPU_RM7000
bool
@@ -1929,7 +1923,6 @@ config SYS_HAS_CPU_BMIPS4380
config SYS_HAS_CPU_BMIPS5000
bool
select SYS_HAS_CPU_BMIPS
- select ARCH_HAS_SYNC_DMA_FOR_CPU

#
# CPU may reorder R->R, R->W, W->R, W->W
--
2.37.1 (Apple Git-137.1)
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