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SubjectRe: [PATCH v2 07/11] dt-bindings: clock: Add StarFive JH7110 Video-Output clock and reset generator
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On 21/02/2023 09:33, Xingyu Wu wrote:
> Add bindings for the Video-Output clock and reset generator (VOUTCRG)
> on the JH7110 RISC-V SoC by StarFive Ltd.
>
> Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
> ---
> .../clock/starfive,jh7110-voutcrg.yaml | 96 +++++++++++++++++++
> .../dt-bindings/clock/starfive,jh7110-crg.h | 22 +++++
> .../dt-bindings/reset/starfive,jh7110-crg.h | 16 ++++
> 3 files changed, 134 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-voutcrg.yaml
>


Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Best regards,
Krzysztof

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