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SubjectRe: [PATCH V2 1/1] x86/topology: fix erroneous smp_num_siblings on Intel Hybrid platform
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Hi, Peter,

> > ---
> > arch/x86/kernel/cpu/topology.c | 5 +++--
> > 1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/x86/kernel/cpu/topology.c
> > b/arch/x86/kernel/cpu/topology.c
> > index 5e868b62a7c4..0270925fe013 100644
> > --- a/arch/x86/kernel/cpu/topology.c
> > +++ b/arch/x86/kernel/cpu/topology.c
> > @@ -79,7 +79,7 @@ int detect_extended_topology_early(struct
> > cpuinfo_x86 *c)
> > * initial apic id, which also represents 32-bit extended
> > x2apic id.
> > */
> > c->initial_apicid = edx;
> > - smp_num_siblings = LEVEL_MAX_SIBLINGS(ebx);
> > + smp_num_siblings = max_t(int, smp_num_siblings,
> > LEVEL_MAX_SIBLINGS(ebx));
> > #endif
> > return 0;
> > }
> > @@ -109,7 +109,8 @@ int detect_extended_topology(struct cpuinfo_x86
> > *c)
> > */
> > cpuid_count(leaf, SMT_LEVEL, &eax, &ebx, &ecx, &edx);
> > c->initial_apicid = edx;
> > - core_level_siblings = smp_num_siblings =
> > LEVEL_MAX_SIBLINGS(ebx);
> > + core_level_siblings = LEVEL_MAX_SIBLINGS(ebx);
> > + smp_num_siblings = max_t(int, smp_num_siblings,
> > LEVEL_MAX_SIBLINGS(ebx));
> > core_plus_mask_width = ht_mask_width =
> > BITS_SHIFT_NEXT_LEVEL(eax);
> > die_level_siblings = LEVEL_MAX_SIBLINGS(ebx);
> > pkg_mask_width = die_plus_mask_width =
> > BITS_SHIFT_NEXT_LEVEL(eax);
>
> Seems ok, but perhaps you can stick an 'int' cast in
> LEVEL_MAX_SIGLINGS instead and write a simpler max() -- and/or
> convert
> smt_num_siblings to unsigned int.
>
yeah, it is doable. I'd prefer to use the current version to keep this
fix simpler if you don't mind.

> Regardless,
>
> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>

Thanks for your ACK.

-rui


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