Messages in this thread | | | Date | Fri, 17 Feb 2023 23:19:56 +0200 | Subject | Re: [PATCH v2 11/14] drm/msm/a6xx: Enable optional icc voting from OPP tables | From | Dmitry Baryshkov <> |
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On 14/02/2023 19:31, Konrad Dybcio wrote: > On GMU-equipped GPUs, the GMU requests appropriate bandwidth votes > for us. This is however not the case for the other GPUs. Add the > dev_pm_opp_of_find_icc_paths() call to let the OPP framework handle > bus voting as part of power level setting. > > Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> --- > drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > index d6b38bfdb3b4..b08ed127f8c4 100644 > --- a/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > +++ b/drivers/gpu/drm/msm/adreno/a6xx_gpu.c > @@ -2338,5 +2338,9 @@ struct msm_gpu *a6xx_gpu_init(struct drm_device *dev) > msm_mmu_set_fault_handler(gpu->aspace->mmu, gpu, > a6xx_fault_handler); > > + ret = dev_pm_opp_of_find_icc_paths(&pdev->dev, NULL); > + if (ret) > + return ERR_PTR(ret); > + > return gpu; > }
-- With best wishes Dmitry
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