Messages in this thread | | | From | Christophe Leroy <> | Subject | Re: [PATCH v4 06/10] soc: fsl: cmp1: Add support for QMC | Date | Thu, 16 Feb 2023 06:43:54 +0000 |
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Le 15/02/2023 à 23:44, Leo Li a écrit : > > >> -----Original Message----- >> From: Herve Codina <herve.codina@bootlin.com> >> Sent: Thursday, January 26, 2023 2:32 AM >> To: Herve Codina <herve.codina@bootlin.com>; Leo Li >> <leoyang.li@nxp.com>; Rob Herring <robh+dt@kernel.org>; Krzysztof >> Kozlowski <krzysztof.kozlowski+dt@linaro.org>; Liam Girdwood >> <lgirdwood@gmail.com>; Mark Brown <broonie@kernel.org>; Christophe >> Leroy <christophe.leroy@csgroup.eu>; Michael Ellerman >> <mpe@ellerman.id.au>; Nicholas Piggin <npiggin@gmail.com>; Qiang Zhao >> <qiang.zhao@nxp.com>; Jaroslav Kysela <perex@perex.cz>; Takashi Iwai >> <tiwai@suse.com>; Shengjiu Wang <shengjiu.wang@gmail.com>; Xiubo Li >> <Xiubo.Lee@gmail.com>; Fabio Estevam <festevam@gmail.com>; Nicolin >> Chen <nicoleotsuka@gmail.com> >> Cc: linuxppc-dev@lists.ozlabs.org; linux-arm-kernel@lists.infradead.org; >> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; alsa-devel@alsa- >> project.org; Thomas Petazzoni <thomas.petazzoni@bootlin.com> >> Subject: [PATCH v4 06/10] soc: fsl: cmp1: Add support for QMC > > Typo: cpm1 > >> >> The QMC (QUICC Multichannel Controller) emulates up to 64 channels within >> one serial controller using the same TDM physical interface routed from the >> TSA. >> >> It is available in some PowerQUICC SoC such as the >> MPC885 or MPC866. >> >> It is also available on some Quicc Engine SoCs. >> This current version support CPM1 SoCs only and some enhancement are >> needed to support Quicc Engine SoCs. >> >> Signed-off-by: Herve Codina <herve.codina@bootlin.com> > > Otherwise looks good to me. > > Acked-by: Li Yang <leoyang.li@nxp.com>
Thanks for the review and the ack.
Were you also able to have a look at patch 2 which implements support for the timeslot assigner (TSA) ?
Christophe
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