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SubjectRe: [PATCH v6 09/12] remoteproc: mediatek: Setup MT8195 SCP core 1 SRAM offset
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Il 13/02/23 04:37, Tinghan Shen ha scritto:
> Because MT8195 SCP core 0 and core 1 both boot from head of SRAM and
> have the same viewpoint of SRAM, SCP has a "core 1 SRAM offset"
> configuration to control the access destination of SCP core 1 to boot
> core 1 from different SRAM location.
>
> The "core 1 SRAM offset" configuration is composed by a range
> and an offset. It works like a simple memory mapped mechanism.
> When SCP core 1 accesses a SRAM address located in the range,
> the SCP bus adds the configured offset to the address to
> shift the physical destination address on SCP SRAM. This shifting is
> transparent to the software running on SCP core 1.
>
> Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>


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