Messages in this thread | | | Date | Fri, 10 Feb 2023 12:26:01 +0100 | Subject | Re: [PATCH v5 3/8] arm64: dts: qcom: sc7280: Add LPASS PIL node | From | Krzysztof Kozlowski <> |
| |
On 09/02/2023 23:55, Stephen Boyd wrote: >> + >> + glink-edge { >> + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS >> + IPCC_MPROC_SIGNAL_GLINK_QMP >> + IRQ_TYPE_EDGE_RISING>; >> + >> + mboxes = <&ipcc IPCC_CLIENT_LPASS >> + IPCC_MPROC_SIGNAL_GLINK_QMP>; >> + >> + label = "lpass"; >> + qcom,remote-pid = <2>; >> + >> + gpr { > > This node name should be apr per the qcom,glink-edge.yaml binding?
No, this is correct. I fixed the glink-edge binding last year.
> >> + compatible = "qcom,gpr"; >> + qcom,glink-channels = "adsp_apps"; >> + qcom,domain = <GPR_DOMAIN_ID_ADSP>; >> + qcom,intents = <512 20>; >> + #address-cells = <1>; >> + #size-cells = <0>; >> + >> + q6apm: service@1 { >> + compatible = "qcom,q6apm"; >> + reg = <GPR_APM_MODULE_IID>; >> + #sound-dai-cells = <0>; >> + >> + q6apmdai: dais { >> + compatible = "qcom,q6apm-dais"; >> + iommus = <&apps_smmu 0x1801 0x0>; >> + }; >> + >> + q6apmbedai: bedais { >> + compatible = "qcom,q6apm-lpass-dais"; >> + #sound-dai-cells = <1>; >> + }; >> + }; >> + >> + q6prm: service@2 { >> + compatible = "qcom,q6prm"; >> + reg = <GPR_PRM_MODULE_IID>; >> + >> + q6prmcc: clock-controller { >> + compatible = "qcom,q6prm-lpass-clocks"; > > This is clk binding but not a clk driver? I'll look away now.
It is a clock driver which was not put into clk. Maybe because it is tightly tied to entire QDSP platform.
Best regards, Krzysztof
| |