lkml.org 
[lkml]   [2023]   [Feb]   [10]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
Date
From
Subject[PATCH v4 04/12] dt-bindings: arm: mediatek: sgmiisys: add MT7981 SoC
Add mediatek,pnswap boolean property as well as an example for the
MediaTek MT7981 SoC making use of that new property.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
.../arm/mediatek/mediatek,sgmiisys.yaml | 22 +++++++++++++++++++
1 file changed, 22 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,sgmiisys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,sgmiisys.yaml
index 99ceb08ad7c0..97d4ab70e541 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,sgmiisys.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,sgmiisys.yaml
@@ -23,6 +23,8 @@ properties:
- enum:
- mediatek,mt7622-sgmiisys
- mediatek,mt7629-sgmiisys
+ - mediatek,mt7981-sgmiisys_0
+ - mediatek,mt7981-sgmiisys_1
- mediatek,mt7986-sgmiisys_0
- mediatek,mt7986-sgmiisys_1
- const: syscon
@@ -33,6 +35,10 @@ properties:
'#clock-cells':
const: 1

+ mediatek,pnswap:
+ description: Invert polarity of the SGMII data lanes
+ type: boolean
+
required:
- compatible
- reg
@@ -51,3 +57,19 @@ examples:
#clock-cells = <1>;
};
};
+ - |
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ sgmiisys0: syscon@10060000 {
+ compatible = "mediatek,mt7981-sgmiisys_0", "syscon";
+ reg = <0 0x10060000 0 0x1000>;
+ mediatek,pnswap;
+ #clock-cells = <1>;
+ };
+ sgmiisys1: syscon@10070000 {
+ compatible = "mediatek,mt7981-sgmiisys_1", "syscon";
+ reg = <0 0x10070000 0 0x1000>;
+ #clock-cells = <1>;
+ };
+ };
--
2.39.1
\
 
 \ /
  Last update: 2023-03-27 00:18    [W:0.068 / U:0.256 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site