lkml.org 
[lkml]   [2023]   [Feb]   [1]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
SubjectRE: [PATCH 4/5] platform/x86/intel/ifs: Implement Array BIST test
Date
> But, when it's down to a single bit in an otherwise completely
> unpopulated byte-sized field, your arguments for using a bitfield kinda
> dry up. But, heck, if that's the hill you want to die on, who am I to
> stop you?

It helps for consistency of style with all the other definitions here where
some other registers don't have such trivial mappings of fields to C base types.

I know that using bitfields in arch independent code is fraught with problems.

But these definitions are for the bits in Intel MSRs (model specific registers).
This seems to be an open & shut case that this code is never going to be
used on some other architecture.

-Tony
\
 
 \ /
  Last update: 2023-03-27 00:06    [W:0.311 / U:0.192 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site