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Subject[PATCH v3 2/4] dt-bindings: firmware: xilinx: Sort node names (clock-controller)
Date
Nodes should be sorted that's why move clock-controller to the top of list.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---

(no changes since v2)

Changes in v2:
- New patch in series

.../firmware/xilinx/xlnx,zynqmp-firmware.yaml | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
index 884917edb19d..51dc4e3afd25 100644
--- a/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
+++ b/Documentation/devicetree/bindings/firmware/xilinx/xlnx,zynqmp-firmware.yaml
@@ -41,6 +41,15 @@ properties:
"#power-domain-cells":
const: 1

+ clock-controller:
+ $ref: /schemas/clock/xlnx,versal-clk.yaml#
+ description: The clock controller is a hardware block of Xilinx versal
+ clock tree. It reads required input clock frequencies from the devicetree
+ and acts as clock provider for all clock consumers of PS clocks.list of
+ clock specifiers which are external input clocks to the given clock
+ controller.
+ type: object
+
gpio:
$ref: /schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml#
description: The gpio node describes connect to PS_MODE pins via firmware
@@ -84,15 +93,6 @@ properties:
vector.
type: object

- clock-controller:
- $ref: /schemas/clock/xlnx,versal-clk.yaml#
- description: The clock controller is a hardware block of Xilinx versal
- clock tree. It reads required input clock frequencies from the devicetree
- and acts as clock provider for all clock consumers of PS clocks.list of
- clock specifiers which are external input clocks to the given clock
- controller.
- type: object
-
required:
- compatible

--
2.36.1

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