Messages in this thread | ![/](/images/icornerl.gif) | | From | Jim Liu <> | Date | Thu, 21 Dec 2023 14:27:13 +0800 | Subject | Re: [PATCH v9 3/3] gpio: nuvoton: Add Nuvoton NPCM sgpio driver |
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Hi Andy
Thanks for your comments. I will modify it in the next version.
But some description as below
> > +static int npcm_sgpio_init_port(struct npcm_sgpio *gpio) > > +{ > > + u8 in_port, out_port, set_port, reg; > > + > > + in_port = GPIO_BANK(gpio->nin_sgpio); > > + if (GPIO_BIT(gpio->nin_sgpio) > 0) > > + in_port += 1; > > This is strange... So, you are telling that offsets start from 1 and not 0? > > > + out_port = GPIO_BANK(gpio->nout_sgpio); > > + if (GPIO_BIT(gpio->nout_sgpio) > 0) > > + out_port += 1; > > Ditto. > Yes, if the customer has defined the in/out pins the offsets start from 1. The NPCM_IOXCFG2_PORT register is the set number of in/out ports. NPCM_IOXCFG2_PORT register define as below: 0~3 bit is the number of input ports 4~7 bit is the number of output ports Each module can support 8 input ports and 8 output ports. > ... > > > + set_port = ((out_port & NPCM_IOXCFG2_PORT) << 4) | (in_port & NPCM_IOXCFG2_PORT); > > Outer parentheses are redundant. > > ... >
Best regards, Jim
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