Messages in this thread | | | From | Rahul Rameshbabu <> | Subject | Re: [PATCH net-next v2 1/1] ptp: clockmatrix: support 32-bit address space | Date | Thu, 09 Nov 2023 15:34:18 -0800 |
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On Thu, 09 Nov, 2023 13:13:52 -0500 Min Li <lnimi@hotmail.com> wrote: > From: Min Li <min.li.xe@renesas.com> > > We used to assume 0x2010xxxx address. Now that > we need to access 0x2011xxxx address, we need > to support read/write the whole 32-bit address space. > > Signed-off-by: Min Li <min.li.xe@renesas.com> > --- > - Drop MAX_ABS_WRITE_PHASE_PICOSECONDS advised by Rahul > > drivers/ptp/ptp_clockmatrix.c | 61 ++-- > drivers/ptp/ptp_clockmatrix.h | 32 +- > include/linux/mfd/idt8a340_reg.h | 542 ++++++++++++++++--------------- > 3 files changed, 328 insertions(+), 307 deletions(-) > > diff --git a/drivers/ptp/ptp_clockmatrix.c b/drivers/ptp/ptp_clockmatrix.c > index f6f9d4adce04..ff316aebff45 100644 > --- a/drivers/ptp/ptp_clockmatrix.c > +++ b/drivers/ptp/ptp_clockmatrix.c
<snip>
> @@ -1705,10 +1720,14 @@ static s32 idtcm_getmaxphase(struct ptp_clock_info *ptp __always_unused) > } > > /* > - * Internal function for implementing support for write phase offset > + * Maximum absolute value for write phase offset in picoseconds > * > * @channel: channel > * @delta_ns: delta in nanoseconds > + * > + * Destination signed register is 32-bit register in resolution of 50ps > + * > + * 0x7fffffff * 50 = 2147483647 * 50 = 107374182350
You would want to drop these comment changes as well. They were moved to idtcm_adjphase.
> */ > static int _idtcm_adjphase(struct idtcm_channel *channel, s32 delta_ns) > {
-- Thanks,
Rahul Rameshbabu
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