Messages in this thread | | | Date | Tue, 28 Nov 2023 18:03:49 +0800 | Subject | Re: [PATCH v5 09/10] phy: qualcomm: phy-qcom-qmp-ufs: Add High Speed Gear 5 support for SM8550 | From | Can Guo <> |
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Hi Neil,
On 11/28/2023 5:59 PM, neil.armstrong@linaro.org wrote: > Hi, > > On 23/11/2023 09:46, Can Guo wrote: >> On SM8550, two sets of UFS PHY settings are provided, one set is to >> support >> HS-G5, another set is to support HS-G4 and lower gears. The two sets >> of PHY >> settings are programming different values to different registers, mixing >> the two sets and/or overwriting one set with another set is definitely >> not >> blessed by UFS PHY designers. >> >> To add HS-G5 support for SM8550, split the two sets of PHY settings into >> their dedicated overlay tables, only the common parts of the two sets of >> PHY settings are left in the .tbls. >> >> Consider we are going to add even higher gear support in future, to avoid >> adding more tables with different names, rename the .tbls_hs_g4 and >> make it >> an array, a size of 2 is enough as of now. >> >> In this case, .tbls alone is not a complete set of PHY settings, so >> either >> tbls_hs_overlay[0] or tbls_hs_overlay[1] must be applied on top of the >> .tbls to become a complete set of PHY settings. >> >> Signed-off-by: Can Guo <quic_cang@quicinc.com> > > Since Vinod has already merged SM8650 UFS PHY support, I'm afraid this > serie will break UFS if the SM8650 UFS tables aren't updated aswell. > > Could you confirm if this will be the case ?
Because this change modifies data struct, it would be caught during compiliation stage even if this change applies cleanly, hence it won't break UFS.
Thanks, Can Guo.
> > Thanks, > Neil > >
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