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    SubjectRe: [PATCH net-next v5 1/1] ptp: clockmatrix: support 32-bit address space
    Date
    On Fri, 24 Nov, 2023 15:20:23 -0500 Min Li <lnimi@hotmail.com> wrote:
    > From: Min Li <min.li.xe@renesas.com>
    >
    > We used to assume 0x2010xxxx address. Now that
    > we need to access 0x2011xxxx address, we need
    > to support read/write the whole 32-bit address space.
    >
    > Signed-off-by: Min Li <min.li.xe@renesas.com>
    > ---
    > - Drop MAX_ABS_WRITE_PHASE_PICOSECONDS advised by Rahul
    > - Apply SCSR_ADDR to scrach register in idtcm_load_firmware advised by Simon
    > - Apply u32 to base in idtcm_output_enable advised by Simon
    > - Correct sync_ctrl0/1 parameter position for idtcm_write advised by Simon
    > - Restore adjphase function suggested by Rahul
    >
    > drivers/ptp/ptp_clockmatrix.c | 69 ++--
    > drivers/ptp/ptp_clockmatrix.h | 32 +-
    > include/linux/mfd/idt8a340_reg.h | 542 ++++++++++++++++---------------
    > 3 files changed, 329 insertions(+), 314 deletions(-)
    >

    Looks good to me.

    Reviewed-by: Rahul Rameshbabu <rrameshbabu@nvidia.com>

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